74HC137D 데이터 시트보기 (PDF) - NXP Semiconductors.
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74HC137D Datasheet PDF : 19 Pages
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Nexperia
74HC137
3-to-8 line decoder, demultiplexer with address latches; inverting
5.2 Pin description
Table 2. Pin description
Symbol
Pin
A0
1
A1
2
A2
3
LE
4
E1
5
E2
6
Y7
7
GND
8
Y6
9
Y5
10
Y4
11
Y3
12
Y2
13
Y1
14
Y0
15
VCC
16
6. Functional description
Description
data input 0
data input 1
data input 2
latch enable input (active LOW)
data enable input 1 (active LOW)
data enable input 2 (active HIGH)
multiplexer output 7
ground (0 V)
multiplexer output 6
multiplexer output 5
multiplexer output 4
multiplexer output 3
multiplexer output 2
multiplexer output 1
multiplexer output 0
positive supply voltage
6.1 Function table
Table 3. Function table[1]
Enable
Input
Output
LE E1 E2 A0 A1 A2 Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
H
L
H
X
X
X
stable
X
H
X
X
X
X
H
H
H
H
H
H
H
H
X
X
L
X
X
X
H
H
H
H
H
H
H
H
L
L
H
L
L
L
L
H
H
H
H
H
H
H
H
L
L
H
L
H
H
H
H
H
H
L
H
L
H
H
L
H
H
H
H
H
H
H
L
H
H
H
L
H
H
H
H
L
L
H
H
H
H
H
L
H
H
H
H
L
H
H
H
H
H
H
L
H
H
L
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
L
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
74HC137
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 23 December 2015
.
4 of 19
© Nexperia B.V. 2017. All rights reserved
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