MAX11046(2009) 데이터 시트보기 (PDF) - Maxim Integrated
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MAX11046 Datasheet PDF : 19 Pages
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4-/6-/8-Channel, 16-Bit,
Simultaneous-Sampling ADCs
PIN
1
2
3
4
5
6
7, 21, 50
8, 20, 51
9
10
11
12
13
14
15
16
17
18
19
22, 28,
35, 43, 49
23, 27, 33,
38, 44, 48
24, 30,
41, 47
25, 31,
40, 46
26
29
32
34
36
37
39
Pin Description
NAME
DB13
DB12
DB11
DB10
DB9
DB8
DGND
DVDD
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
EOC
CONVST
SHDN
RDC
FUNCTION
16-Bit Parallel Data Bus Digital Output Bit 13
16-Bit Parallel Data Bus Digital Output Bit 12
16-Bit Parallel Data Bus Digital Output Bit 11
16-Bit Parallel Data Bus Digital Output Bit 10
16-Bit Parallel Data Bus Digital Output Bit 9
16-Bit Parallel Data Bus Digital Output Bit 8
Digital Ground
Digital Supply. Bypass to DGND with a 0.1µF capacitor at each DVDD input.
16-Bit Parallel Data Bus Digital Output Bit 7
16-Bit Parallel Data Bus Digital Output Bit 6
16-Bit Parallel Data Bus Digital Output Bit 5
16-Bit Parallel Data Bus Digital Output Bit 4
16-Bit Parallel Data Bus Digital I/O Bit 3
16-Bit Parallel Data Bus Digital I/O Bit 2
16-Bit Parallel Data Bus Digital I/O Bit 1
16-Bit Parallel Data Bus Digital I/O Bit 0
Active-Low, End-of-Conversion Output. EOC goes low when a conversion is completed. EOC goes high
when a conversion is initiated.
Convert Start Input. The rising edge of CONVST ends sample and starts a conversion on the captured
sample. The ADC is in acquisition mode when CONVST is low and CONVST mode = 0.
Shutdown Input. If SHDN is held high, the entire device will enter and stay in a low-current state.
Contents of the configuration register are not lost when in the shutdown state.
Reference Buffer Decoupling. Connect all RDC outputs together. Bypass to AGND with at least a 80µF
total capacitance. See the Layout, Grounding, and Bypassing section.
AGNDS Signal Ground. Connect all AGND and AGNDS inputs together.
AVDD Analog Supply Input. Bypass AVDD to AGND with a 0.1µF capacitor at each AVDD input.
AGND
CH0
CH1
CH2
CH3
REFIO
CH4
CH5
Analog Ground. Connect all AGND inputs together.
Channel 0 Analog Input
Channel 1 Analog Input
Channel 2 Analog Input
Channel 3 Analog Input
External Reference Input/Internal Reference Output. Place a 0.1µF capacitor from REFIO to AGND.
Channel 4 Analog Input
Channel 5 Analog Input
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