U635H16 데이터 시트보기 (PDF) - Zentrum Mikroelektronik Dresden AG

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U635H16

PowerStore 2K x 8 nvSRAM

Zentrum Mikroelektronik Dresden AG 

U635H16

SOFTWARE NONVOLATILE RECALL

A RECALL cycle of the EEPROM data into the SRAM

is initiated with a sequence of READ operations in a

manner similar to the STORE initiation. To initiate the

RECALL cycle the following sequence of READ opera-

tions must be performed:

1. Read address 000 (hex) Valid READ

2. Read address 555 (hex) Valid READ

3. Read address 2AA (hex) Valid READ

4. Read address 7FF (hex) Valid READ

5. Read address 0F0 (hex) Valid READ

6. Read address 70E (hex) Initiate RECALL

Internally, RECALL is a two step procedure. First, the

SRAM data is cleared and second, the nonvolatile

information is transferred into the SRAM cells. The

RECALL operation in no way alters the data in the

EEPROM cells. The nonvolatile data can be recalled

an unlimited number of times.

HARDWARE PROTECTION

The U635H16 offers hardware protection against inad-

vertent STORE operation through VCC Sense. When

VCC < VSWITCH all software controllod STORE operati-

ons will be inhibited.

LOW AVERAGE ACTIVE POWER

The U635H16 has been designed to draw significantly

less power when E is LOW (chip enabled) but the

access cycle time is longer than 55 ns.

When E is HIGH the chip consumes only standby cur-

rent.

The overall average current drawn by the part depends

on the following items:

1. CMOS or TTL input levels

2. the time during which the chip is disabled (E HIGH)

3. the cycle time for accesses (E LOW)

4. the ratio of READs to WRITEs

5. the operating temperature

6. the VCC level

104

December 12, 1997

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