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SAA7108AE
NXP
NXP Semiconductors. NXP
SAA7108AE Datasheet PDF : 208 Pages
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NXP Semiconductors
SAA7108AE; SAA7109AE
HD-CODEC
2.2 Video scaler
I Both up and downscaling
I Conversion to square pixel format
I NTSC to 288 lines (video phone)
I Phase accuracy better than 164 pixel or line, horizontally or vertically
I Independent scaling definitions for odd and even fields
I Anti-alias filter for horizontal scaling
I Provides output as:
N Scaled active video
N Raw CVBS data for INTERCAST, WAVE-PHORE, POPCON applications or
general VBI data decoding (27 MHz or sample rate converted)
I Local video output for Y-CB-CR 4 : 2 : 2 format (VMI, VIP and ZV)
2.3 Video encoder
I Digital PAL/NTSC encoder with integrated high quality scaler and anti-flicker filter for
TV output from a PC
I Supports Intel Digital Video Out (DVO) low-voltage interfacing to graphics controller
I 27 MHz crystal-stable subcarrier generation
I Maximum graphics pixel clock 85 MHz at double edged clocking, synthesized on-chip
or from external source
I Programmable assignment of clock edge to bytes (in double edged mode)
I Synthesizable pixel clock (PIXCLK) with minimized output jitter, can be used as
reference clock for the VGC, as well
I PIXCLK output and bi-phase PIXCLK input (VGC clock loop-through possible)
I Hot-plug detection through dedicated interrupt pin
I Supported VGA resolutions for PAL or NTSC legacy video output up to 1280 × 1024
graphics data at 60 Hz or 50 Hz frame rate
I Supported VGA resolutions for HDTV output up to 1920 × 1080 interlaced graphics
data at 60 Hz or 50 Hz frame rate
I Three Digital-to-Analog Converters (DACs) for CVBS (BLUE, CB), VBS (GREEN,
CVBS) and C (RED, CR) at 27 MHz sample rate (signals in parenthesis are optionally
selected), all at 10-bit resolution
I Non-interlaced CB-Y-CR or RGB input at maximum 4 : 4 : 4 sampling
I Downscaling and upscaling from 50 % to 400 %
I Optional interlaced CB-Y-CR input of Digital Versatile Disk (DVD) signals
I Optional non-interlaced RGB output to drive second VGA monitor (bypass mode,
maximum 85 MHz)
I 3 × 256 bytes RGB Look-Up Table (LUT)
I Support for hardware cursor
I HDTV up to 1920 × 1080 interlaced and 1280 × 720 progressive, including 3-level
sync pulses
I Programmable border color of underscan area
I Programmable 5-line anti-flicker filter
I On-chip 27 MHz crystal oscillator (3rd harmonic or fundamental 27 MHz crystal)
I Fast I2C-bus control port (400 kHz)
SAA7108AE_SAA7109AE_3
Product data sheet
Rev. 03 — 6 February 2007
© NXP B.V. 2007. All rights reserved.
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