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ADP3334 데이터 시트보기 (PDF) - Analog Devices

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ADP3334 Datasheet PDF : 11 Pages
First Prev 11
Data Sheet
PIN 1 INDEX
AREA
0.80
0.75
0.70
SEATING
PLANE
3.10
3.00 SQ
2.90
1.84
1.74
1.64
5
0.50 BSC
8
TOP VIEW
0.50
0.40
0.30
EXPOSED
PAD
1.55
1.45
1.35
4
1
BOTTOM VIEW
PIN 1
INDICATOR
(R 0.15)
FOR PROPER CONNECTION OF
0.05 MAX
0.02 NOM
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATIONS
SECTION OF THIS DATA SHEET.
COPLANARITY
0.30
0.08
0.25
0.203 REF
0.20
COMPLIANT TO JEDEC STANDARDS MO-229-WEED
Figure 9. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD]
3 mm × 3 mm Body, Very Very Thin, Dual Lead
(CP-8-13)
Dimensions shown in millimeters
ADP3334
ORDERING GUIDE
Model1
ADP3334ARZ
ADP3334ARZ-REEL
ADP3334ARZ-REEL7
ADP3334ACPZ-REEL7
ADP3334ARMZ-REEL7
1 Z = RoHS Compliant Part.
Package Description
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Standard Small Outline Package [SOIC_N]
8-Lead Lead Frame Chip Scale Package [LFCSP_WD]
8-Lead Mini Small Outline Package [MSOP]
Package Option
R-8
R-8
R-8
CP-8-13
RM-8
Branding
LLA
L1N
REVISION HISTORY
1/14—Rev. B to Rev. C
Added EPAD Note............................................................................ 3
Changes to Figure 9, Outline Dimensions .................................. 10
Changes to Ordering Guide .......................................................... 11
3/03—Rev. A to Rev. B
Edits to Specifications ...................................................................... 2
Edits to Output Voltage ................................................................... 6
Added text to Output Voltage section ........................................... 7
Added Figure 4.................................................................................. 7
Edits to Calculating Junction Temperature section ..................... 8
Renumbered Figures 5 and 6 .......................................................... 8
1/03—Rev. 0 to Rev. A
Added 8-Lead LFCSP and 8-Lead MSOP Package ........ Universal
Edits to product title .........................................................................1
Edits to Features.................................................................................1
Edits to Applications .........................................................................1
Edits to General Description ...........................................................1
Removed pin numbers from Figure 1.............................................1
Edits to Specifications .......................................................................2
Edits to Absolute Maximum Ratings ..............................................3
Edits to Ordering Guide ...................................................................3
Added pinouts to Pin Configurations ............................................3
Added text to Calculating Junction Temperature section ...........8
Added LFCSP Layout Considerations section ..............................8
Added Figure 5 ..................................................................................8
Updated 8-Lead SOIC Package..................................................... 10
©2014 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02610-0-1/14(C)
Rev. C | Page 11

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