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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

IDT49FCT3805AD 데이터 시트보기 (PDF) - Integrated Device Technology

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IDT49FCT3805AD
IDT
Integrated Device Technology IDT
IDT49FCT3805AD Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
IDT49FCT3805/A
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE(3,4)
Symbol
Parameter
tPLH Propagation Delay
tPHL INA to OAn, INB to OBn
tR
Output Rise Time
tF
Output Fall Time
FCT3805
Com'l.
Mil.
FCT3805A
Com'l.
Mil.
Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max.
CL = 50pF 1.5 5.8
RL = 500
1.5 5.0
— 2.0 —
— 2.0 —
Unit
ns
ns
— 2.0 —
— 2.0 —
ns
tSK(o) Output skew: skew between outputs of all
banks of same package (inputs tied together)
— 0.7 —
— 0.5 —
ns
tSK(p) Pulse skew: skew between opposite
transitions of same output (|tPHL–t PLH|)
— 1.2 —
— 1.0 —
ns
tSK(t)
Package skew: skew between outputs of
different packages at same power supply
voltage, temperature, package type and
speed grade
— 1.5 —
— 1.2 —
ns
tPZL Output Enable Time
tPZH OEA to OAn, OEB to OBn
1.5 6.5
1.5 6.0
ns
tPLZ Output Disable Time
tPHZ OEA to OAn, OEB to OBn
1.5 5.5
1.5 5.0
ns
NOTES:
3102 tbl 07
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. tPLH, tPHL, tSK(t) production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay
limits do not imply skew.
9.5
5

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