SL4051BD 데이터 시트보기 (PDF) - System Logic Semiconductor

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SL4051BD

Analog Multiplexer Demultiplexer

System Logic Semiconductor 

SL4051B

AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=20.0 ns)

Symbol

Parameter

VCC

Guaranteed Limit

V ≥ -55 ≤ 25 ≤ 125 Unit

°C

°C

°C

tPLH, tPHL Maximum Propagation Delay , Analog Input to

5

60

60

120

ns

Analog Output (Figure 1)

10

30

30

60

RL=200kΩ

15

20

20

40

tPLZ, tPHZ Maximum Propagation Delay , Address to Analog 5

720

720

1440 ns

Output (Figure 2) RL=10kΩ

10 320

320

640

VEE=GND=0 15

240

240

480

VEE=-5V 5

450

450

900

tPLZ, Maximum Propagation Delay, Enable to Analog

5

720

720

1440 ns

tPZL

Output (Figure 2) RL=10kΩ

10 320

320

640

VEE=GND=0 15

240

240

480

VEE=-10V 5

400

400

800

tPHZ, Maximum Propagation Delay, Enable to Analog

5

450

450

900

ns

tPZH Output (Figure 2) RL=10kΩ

10 210

210

420

VEE=GND=0 15

160

160

320

VEE=-10V 5

300

300

600

CIN Maximum Input Capacitance, Channel-Select or

-

7.5

7.5

7.5

pF

Enable Inputs

CI/O Maximum Capacitance

VEE=GND=-5V

CIS

5

-

5

-

pF

COS

5

-

30

-

Feedthrough CIOS

5

-

0.2

-

SLS

System Logic

Semiconductor

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