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MC74HCT138AF Datasheet PDF : 8 Pages
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MC74HCT138A
1-of-8 Decoder/
Demultiplexer with LSTTL
Compatible Inputs
High–Performance Silicon–Gate CMOS
The MC74HCT138A is identical in pinout to the LS138. The
HCT138A may be used as a level converter for interfacing TTL or
NMOS outputs to High Speed CMOS inputs.
The HCT138A decodes a three–bit Address to one–of–eight
active–lot outputs. This device features three Chip Select inputs, two
active–low and one active–high to facilitate the demultiplexing,
cascading, and chip–selecting functions. The demultiplexing function
is accomplished by using the Address inputs to select the desired
device output; one of the Chip Selects is used as a data input while the
other Chip Selects are held in their active states.
• Output Drive Capability: 10 LSTTL Loads
• TTL/NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1.0 µA
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 122 FETs or 30.5 Equivalent Gates
http://onsemi.com
16
1
16
1
PDIP–16
N SUFFIX
CASE 648
SO–16
D SUFFIX
CASE 751B
MARKING
DIAGRAMS
16
MC74HCT138AN
AWLYYWW
1
16
HCT138A
AWLYWW
1
16
16
1
TSSOP–16
DT SUFFIX
CASE 948F
HCT
138A
ALYW
1
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
ORDERING INFORMATION
Device
Package Shipping
MC74HCT138AN
PDIP–16 2000 / Box
MC74HCT138AD
SOIC–16
48 / Rail
MC74HCT138ADR2 SOIC–16 2500 / Reel
MC74HCT138ADT TSSOP–16 96 / Rail
MC74HCT138ADTR2 TSSOP–16 2500 / Reel
© Semiconductor Components Industries, LLC, 1999
1
March, 2000 – Rev. 7
Publication Order Number:
MC74HCT138A/D
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