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74ABT648

Octal transceiver/register; inverting; 3-state

NXP Semiconductors. 

74ABT648

Octal transceiver/register; inverting; 3-state

Rev. 04 — 27 April 2005

Product data sheet

1. General description

The 74ABT648 high-performance BiCMOS device combines low static and dynamic

power dissipation with high speed and high output drive.

The 74ABT648 transceiver/register consists of bus transceiver circuits with inverting

3-state outputs, D-type flip-flops, and control circuitry arranged for multiplexed

transmission of data directly from the input bus or the internal registers. Data on the A or B

bus will be clocked into the registers as the appropriate clock pin goes HIGH.

Output enable (OE) and direction (DIR) pins are provided to control the transceiver

function.

In the transceiver mode, data present at the high-impedance port may be stored in either

the A or B register or both.

The select (SAB, SBA) pins determine whether data is stored or transferred through the

device in real time. The DIR determines which bus will receive data when the OE is active

(LOW).

In the isolation mode (OE = HIGH), data from bus A may be stored in the B register and/or

data from bus B may be stored in the A register. Outputs from real time or stored registers

will be inverted. When an output function is disabled, the input function is still enabled and

may be used to store and transmit data. Only one of the two buses A or B may be driven

at a time.

2. Features

s Combines 74ABT245 and 74ABT374A type functions in one device

s Independent registers for A and B buses

s Multiplexed real time and stored data

s 3-state buffers

s Live insertion and extraction permitted

s Output capability: +64 mA and −32 mA

s Power-up 3-state

s Power-up reset

s Latch-up protection:

x JESD78: exceeds 500 mA

s ESD protection:

x MIL STD 883 method 3015: exceeds 2000 V

x Machine model: exceeds 200 V

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