74HC30 데이터 시트보기 (PDF) - NXP Semiconductors.
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74HC30 Datasheet PDF : 16 Pages
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NXP Semiconductors
74HC30; 74HCT30
8-input NAND gate
Table 7. Dynamic characteristics …continued
GND = 0 V; CL = 50 pF; for load circuit see Figure 6.
Symbol Parameter
Conditions
Min
CPD
power dissipation per package; VI = GND to VCC [3] -
capacitance
74HCT30
tpd
propagation delay A, B, C, D, E, F, G, H to Y;
[1]
see Figure 5
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
tt
transition time
VCC = 4.5 V; see Figure 5
CPD
power dissipation per package;
capacitance
VI = GND to VCC 1.5 V
-
-
[2]
-
[3]
-
[1] tpd is the same as tPHL and tPLH.
[2] tt is the same as tTHL and tTLH.
[3] CPD is used to determine the dynamic power dissipation (PD in W):
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
25 C
Typ
15
16
12
7
15
40 C to +125 C Unit
Max Max
Max
(85 C) (125 C)
-
-
- pF
28
35
-
-
15
19
-
-
42 ns
- ns
22 ns
- pF
11. Waveforms
VI
A, B, C, D,
E, F, G, H
input
GND
VOH
nY output
VOL
VM
tPHL
VY
tTHL
VM
VX
tPLH
tTLH
Fig 5.
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Input to output propagation delays
001aal792
Table 8. Measurement points
Type
Input
VM
74HC30
0.5VCC
74HCT30
1.3 V
Output
VM
0.5VCC
1.3 V
VX
0.1VCC
0.1VCC
74HC_HCT30
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 27 December 2012
VY
0.9VCC
0.9VCC
© NXP B.V. 2012. All rights reserved.
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