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NLV14046BDWG

Phase Locked Loop

ON Semiconductor 

MC14046B

PCAin

14

@ FREQUENCY f′ 3

PCBin

PHASE

COMPARATOR

2 OR 13

PC1out

OR

PC2out

VCOin

9 SOURCE 10

FOLLOWER

SFout

RSF

EXTERNAL

LOW-PASS

FILTER

EXTERNAL

÷N

COUNTER

9

VCO

11 12 6

CIA

R1 R2

CI

4

7

CIB

VCOout

@ FREQUENCY Nf′ = f

Typical Low−Pass Filters

(a)

R3

(a)

R3

INPUT

C2

OUTPUT

Ǹ 2fC

[

1

p

2 p fL

R3 C2

INPUT

OUTPUT

R4

C2

Typically:

R4 C2

+

6N

fmax

–

N

2pDf

(R3

)

3, 000W) C2

+

100NDf

fmax2

–

R4

C2

D f = fmax − fmin

NOTE: Sometimes R3 is split into two series resistors each R3 ÷ 2. A capacitor CC is then placed from the midpoint to ground. The value for

CC should be such that the corner frequency of this network does not significantly affect Wn. In Figure B, the ratio of R3 to R4 sets

the damping, R4 ^ (0.1)(R3) for optimum results.

LOW−PASS FILTER

Definitions: N = Total division ratio in feedback loop

Kφ = VDD/π for Phase Comparator 1

Kφ = VDD/4 π for Phase Comparator 2

2 p D fVCO

KVCO + VDD – 2

for a typical design

V

Wn

^

2 p fr

10

(at phase detector input)

ζ ^ 0.707

Filter A

Ǹ wn +

KfKVCO

NR3C2

Filter B

Ǹ wn +

KfKVCO

NC2(R3 ) R4)

z

+

Nwn

2KfKVCO

F(s)

+

1

R3C2S

)

1

z + 0.5 wn (R3C2 ) KfKNVCO)

F(s)

+

R3C2S ) 1

S(R3C2 ) R4C2)

)

1

Waveforms

Phase Comparator 1

PCAin

VDD

VSS

Phase Comparator 2

PCAin

VDD

VSS

PCBin

PC1out

VCOin

VOH

VOH

VOL

PCBin

VOL

VOH

VOH

LD

VOL

VOL

VOH

PC2out

VOH

VOL

VOL

VCOin

VOH

VOL

Note: for further information, see:

(1) F. Gardner, “Phase−Lock Techniques”, John Wiley and Son, New York, 1966.

(2) G. S. Moschytz, “Miniature RC Filters Using Phase−Locked Loop”, BSTJ, May, 1965.

(3) Garth Nash, “Phase−Lock Loop Design Fundamentals”, AN−535, Motorola Inc.

(4) A. B. Przedpelski, “Phase−Locked Loop Design Articles”, AR254, reprinted by Motorola Inc.

Figure 3. General Phase−Locked Loop Connections and Waveforms

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