AP-MSDXXXCX4P-1TM 데이터 시트보기 (PDF) - Unspecified

부품명

상세내역

일치하는 목록

AP-MSDXXXCX4P-1TM

Industrial Micro SD 3.0

Unspecified 

Industrial Micro SD 3.0

AP-MSDxxxCX4P-1TM

1.2.1 Flash Management

The SD controller contains logic/physical flash block mapping and bad block management system. It will

manage all flash block including user data space and spare block.

The Micro SD also contains a sophisticated defect and error management system. It does a read after

write under margin conditions to verify that the data is written correctly (except in the case of write pre-

erased sectors). In case that a bit is found to be defective, the SD will replace this bad bit with a spare bit

within the sector header. If necessary, the Micro SD will even replace the entire sector with a spare sector.

This is completely transparent to the master (host device) and does not consume any user data space.

1.2.2 Powerful ECC Algorithms

The powerful ECC algorithms will enhance flash block use rate and whole device life. The SD controller

supports up to 68bits ECC circuits to protect data transfer.

1.2.3 Power Management

A power saving feature of the Micro SD is automatic entrance and exit from sleep mode. Upon completion

of an operation, the SD will enter the sleep mode to conserve power if no further commands are received

within X seconds, where X is programmable by software. The master does not have to take any action for

this to occur. The SD is in sleep mode except when the host is accessing it, thus conserving power.

Any command issued by the master to the Micro SD will cause it to exit sleep mode and response to the

master.

4

© 2013 Apacer Technology, Inc.

Rev. 1.1

Share Link: