A6219DS 데이터 시트보기 (PDF) - Allegro MicroSystems

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A6219DS

Dual Full-Bridge PWM Motor Driver

Allegro MicroSystems 

L6219DS

Dual Full-Bridge PWM Motor Driver

Logic Control of Output Current

Two logic level inputs (I0 and I1) allow digital selection of

the motor winding current at 100%, 67%, 33%, or 0% of the

maximum level per the table below. The 0% output current

condition turns off all drivers in the bridge and can be used as an

OUTPUT ENABLE function.

These logic level inputs greatly enhance the implementation of

μP-controlled drive formats.

During half-step operations, the I0 and I1 allow the μP to control

the motor at a constant torque between all positions in an eight-

step sequence. This is accomplished by digitally selecting 100%

drive current when only one phase is on and 67% drive current

when two phases are on. Logic highs on both I0 and I1 turn off all

drivers to allow rapid current decay when switching phases. This

helps to ensure proper motor operation at high step rates.

The logic control inputs can also be used to select a reduced

current level (and reduced power dissipation) for ‘hold’

conditions and/or increased current (and available torque) for

start-up conditions.

Current-Control Truth Table

l0

I1

Output Current

L

L

VREF/10 RS = ITRIP

H

L

VREF/15 RS = 2/3 ITRIP

L

H

VREF/30 RS = 1/3 ITRIP

H

H

0

General

The PHASE input to each bridge determines the direction

motor winding current flows. An internally generated dead time

(approximately 2 μs) prevents crossover currents that can occur

when switching the PHASE input.

All four drivers in the bridge output can be turned off between

steps (I0 = I1 ≥ 2.4 V) resulting in a fast current decay through the

internal output clamp and flyback diodes. The fast current decay

is desirable in half-step and high-speed applications. The PHASE,

I0,and I1 inputs float high.

Varying the reference voltage (VREF) provides continuous control

of the peak load current for microstepping applications.

Thermal protection circuitry turns off all drivers when the

junction temperature reaches 170°C. It is only intended to protect

the device from failures due to excessive junction temperature

and should not imply that output short circuits are permitted. The

output drivers are re-enabled when the junction temperature cools

to 145°C.

The L6219DS output drivers are optimized for low output

saturation voltages—less than 1.8 V total (source plus sink) at

500 mA. Under normal operating conditions, when combined

with the excellent thermal properties of the fused internal lead

package design, this allows continuous operation of both bridges

simultaneously at 500 mA.

Allegro MicroSystems, Inc.

6

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

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