E5551 데이터 시트보기 (PDF) - Temic Semiconductors

부품명

상세내역

일치하는 목록

E5551

Standard R/W Identification IC with Anticollision

Temic Semiconductors 

e5551

Read mode

RF

Write mode

Start of writing

(start gap)

Figure 18. Start of writing

Decoder

The duration of the gaps is usually 50 to 150 µs. The time

between two gaps is nominally 24 field clocks for a ‘0’

and 56 field clocks for a ‘1’. When there is no gap for more

than 64 field clocks after previous gap, the IDIC exits

write mode; it starts with programming if the correct

number of valid bits were received.

If there is a gap fail – i.e., one or more of the intervals did

represent not a valid ‘0’ or ‘1’ – the IC does not program,

but enters read mode beginning with block 1, bit 1.

Writing Data into the e5551

The e5551 expects a two bit OP-code first. There are two

valid OP-codes (’10‘ and ’11‘). If the OP-code is invalid,

the e5551 starts read mode beginning with block 1 after

the last gap. The OP-code (’10‘) is followed by different

information (see figure 16):

D Standard writing needs the OP-code, the lock bit, the

32 data bits and the 3-bit block address.

D Writing with usePWD set requires a valid password

between OP-code and address/data bits.

D In AOR mode with usePWD, OP-code and a valid

password are necessary to enable modulation.

D The STOP OP-code is used to silence the e5551 (dis-

able damping until power is cycled).

Note: The data bits are read in the same order as written.

STOP OP-Code

The STOP OP-code (‘11’) is used to stop modulation until

a power-on reset occurs. This feature can be used to have

a steady RF field where single transponders are collected

one by one. Each IC is read and than disabled, so that it

does not interfere with the next IC.

Note: The STOP OP-code should contain only the two

OP-code bits to disable the IC. Any additional data sent

will not be ignored, and the IC will not stop modulation.

Standard OP-code

1 0 more data ...

Start gap

Stop OP-code

1

1

> 64 clocks

Read mode

Write mode

Figure 19. OP-code transmission

Password

When password mode is on (usePWD = 1), the first

32 bits after the OP-Code are regarded as the password.

They are compared bit-by-bit with the contents of

block 7, starting at bit 1. If the comparison fails, the IC

will not program the memory, but restart in read mode at

block 1 once writing has completed.

Notes:

D If PWD is not set, but the IC receives a write

datastream containing any 32 bits in place of a pass-

word, the IC will enter programming mode.

D In password mode, MAXBLK should be set to a value

below 7 to prevent the password from being trans-

mitted by the e5551.

D Every transmission of 2 OP-code bits, 32 password

bits, one lock bit, 32 data bits and 3 address bits

(= 70 bits) needs about 35 ms. Testing all 232 possible

combinations (about 4.3 billion) takes about 40,000 h,

or over four years. This is a sufficient password

protection for a general-purpose IDIC.

Rev. A2, 19-Apr-00

11 (21)

Share Link: