UT62256CSC-35LLE 데이터 시트보기 (PDF) - Utron Technology Inc

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UT62256CSC-35LLE

32K X 8 BIT LOW POWER CMOS SRAM

Utron Technology Inc 



Rev. 1.0

UTRON

UT62256C(E)

32K X 8 BIT LOW POWER CMOS SRAM

DATA RETENTION CHARACTERISTICS (TA = -20℃~80℃)

PARAMETER

SYMBOL

Vcc for Data Retention VDR

Data Retention Current IDR

Chip Disable to Data

Retention Time

Recovery Time

tRC* = Read Cycle Time

tCDR

tR

TEST CONDITION

CE ≧ VCC-0.2V

Vcc=3V

CE ≧ VCC-0.2V

See Data Retention

Waveforms (below)

DATA RETENTION WAVEFORM

VCC

CE

4.5V

tCDR

Data Retention Mode

VDR ≧ 2V

MIN.

2.0

-L

-

- LL -

0

TYP.

-

1

0.5

-

tRC*

-

4.5V

tR

MAX.

5.5

50

20

-

-

UNIT

V

µA

µA

ns

ns

VSS

CE ≧ VCC -0.2V

UTRON TECHNOLOGY INC.

1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.

TEL: 886-3-5777882 FAX: 886-3-5777919

6

P80071

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