M24M01-VLA6P 데이터 시트보기 (PDF) - STMicroelectronics

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M24M01-VLA6P

1 Mbit Serial I²C Bus EEPROM

STMicroelectronics 

M24M01

SUMMARY DESCRIPTION

The M24M01 is a 1 Mbit (131,072 x 8) electrically

erasable programmable memory (EEPROM) ac-

cessed by an I2C-compatible bus.

Figure 2. Logic Diagram

VCC

following the bus master’s 8-bit transmission.

When data is read by the bus master, the bus

master acknowledges the receipt of the data byte

in the same way. Data transfers are terminated by

a Stop condition after an Ack for Write, and after a

NoAck for Read.

Figure 3. LGA Connections

2

E1-E2

SCL

WC

M24M01

VSS

SDA

AI04048B

Table 1. Signal Names

E1, E2

Chip Enable

SDA

Serial Data

SCL

Serial Clock

WC

Write Control

VCC

VSS

Supply Voltage

Ground

I2C uses a two wire serial interface, comprising a

bi-directional data line and a clock line. The devic-

es carry a built-in 4-bit Device Type Identifier code

(1010) in accordance with the I2C bus definition.

The device behaves as a slave in the I2C protocol,

with all memory operations synchronized by the

serial clock. Read and Write operations are initiat-

ed by a Start condition, generated by the bus mas-

ter. The Start condition is followed by a Device

Select Code and RW bit (as described in Table 2),

terminated by an acknowledge bit.

When writing data to the memory, the device in-

serts an acknowledge bit during the 9th bit time,

DU

E1

E2

VSS

M24M01

1

8

2

7

3

6

4

5

VCC

WC

SCL

SDA

AI04051C

Note: 1. DU = Don’t Use (should be left unconnected, or tied to

VSS)

Power On Reset: VCC Lock-Out Write Protect

In order to prevent data corruption and inadvertent

Write operations during Power-up, a Power On

Reset (POR) circuit is included. At Power-up, the

internal reset is held active until VCC has reached

the POR threshold value, and all operations are

disabled – the device will not respond to any com-

mand. In the same way, when VCC drops from the

operating voltage, below the POR threshold value,

all operations are disabled and the device will not

respond to any command. A stable and valid VCC

must be applied before applying any logic signal.

When the power supply is turned on, VCC rises

from VSS to VCC(min), passing through a value Vth

in between. The device ignores all instructions un-

til a time delay of tPU has elapsed after the mo-

ment that VCC rises above the Vth threshold.

However, the correct operation of the device is not

guaranteed if, by this time, VCC is still below

VCC(min).No instructions should be sent until the

later of:

– tPU after VCC passed the Vth threshold

– VCC passed the VCC(min) level

These values are specified in Table 9.

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