RT9245C 데이터 시트보기 (PDF) - Richtek Technology
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RT9245C Datasheet PDF : 25 Pages
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RT9245C
VID on the Fly
With external pull up resistors tied to VID pins, RT9245C
converters different VID codes from CPU into output
voltage. Figure 16 and Figure 17 show the waveforms of
VID on the fly function.
VID on the Fly (Falling)
PWM
VCORE
VFB
CH1:(5V/Div)
CH2:(500mV/Div)
CH3:(500mV/Div)
CH4:(1V/Div)
VID125
VDAC = 1.500, IOUT = 5A
Time (25μs/Div)
Figure 16
VID on the Fly (Rising)
PWM
VCORE
VFB
CH3:(500mV/Div)
CH4:(1V/Div)
CH1:(5V/Div)
CH2:(500mV/Div)
VID125
VDAC = 1.500, IOUT = 5A
Time (25μs/Div)
Figure 17
RB1
1/4 IVOSS
-
EA
+
VDAC-VADJ
Output Voltage Offset Function
To meet Intel® requirement of initial offset of load line,
RT9245C provides programmable initial offset function.
External resistor RVOSS and voltage source at VOSS pin
generate offset current
IVOSS
=
VVOSS
RVOSS
, where VVOSS is 1V typical. One quarter of IVOSS flows
through RB1 as shown in Figure 18. Error amplifier would
hold the inverting pin equal to VDAC - VADJ. Thus output
voltage is subtracted from VDAC - VADJ for a constant offset
voltage.
VCORE
=
VDAC
-
VADJ
-
RFB1
4 ×RVOSS
A positive output voltage offset is possible by connecting
RVOSS to VDD instead of to GND. Please note that when
RVOSS is connected to VDD, VVOSS is VDD − 2V typically
and half of IVOSS flows through RFB1. VCORE is rewritten as:
VCORE = VDAC - VADJ + RFB1
RVOSS
1.284
1.282
1.28
1.278
1.276
1.274
1.272
1.27
1.268
50
Voltage Offset Function
60
70
80
90
100 110
ROSS ((kٛΩ)
Figure 19
Load Line Setting and Thermal Compensation
VADJ = 8 x AVG(IX) x RADJ
VOUT = VDAC - VADJ
AVG(IX) is a PTC current. By properly use an NTC resistor
at ADJ. Load line can be thermally compensated.
Figure 18. Offset Setting
DS9245C-02 March 2007
www.richtek.com
17
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