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ALC888S

7.1+2 CHANNEL HIGH DEFINITION AUDIO CODEC WITH TWO INDEPENDENT S/PDIF-OUT

Realtek Semiconductor 

ALC888S & ALC888SDD

Datasheet

TABLE 52. VERB – SET CONVERTER STREAM, CHANNEL (VERB ID=706H) ................................................................................48

TABLE 53. VERB – GET PIN WIDGET CONTROL (VERB ID=F07H) ..............................................................................................49

TABLE 54. VERB – SET PIN WIDGET CONTROL (VERB ID=707H) ...............................................................................................50

TABLE 55. VERB – GET UNSOLICITED RESPONSE CONTROL (VERB ID=F08H) ...........................................................................51

TABLE 56. VERB – SET UNSOLICITED RESPONSE CONTROL (VERB ID=708H) ............................................................................51

TABLE 57. VERB – GET PIN SENSE (VERB ID=F09H)..................................................................................................................52

TABLE 58. VERB – EXECUTE PIN SENSE (VERB ID=709H)..........................................................................................................52

TABLE 59. VERB – GET CONFIGURATION DEFAULT (VERB ID=F1CH) .......................................................................................53

TABLE 60. VERB – SET CONFIGURATION DEFAULT BYTES 0, 1, 2, 3 (VERB ID=71CH/71DH/71EH/71FH FOR BYTES 0, 1, 2, 3)53

TABLE 61. VERB – GET BEEP GENERATOR (VERB ID= F0AH) ..................................................................................................54

TABLE 62. VERB – SET BEEP GENERATOR (VERB ID= 70AH) ...................................................................................................54

TABLE 63. VERB – GET GPIO DATA (VERB ID= F15H) ..............................................................................................................55

TABLE 64. VERB – SET GPIO DATA (VERB ID= 715H) ...............................................................................................................55

TABLE 65. VERB – GET GPIO ENABLE MASK (VERB ID= F16H)................................................................................................56

TABLE 66. VERB – SET GPIO ENABLE MASK (VERB ID=716H) .................................................................................................56

TABLE 67. VERB – GET GPIO DIRECTION (VERB ID=F17H).......................................................................................................57

TABLE 68. VERB – SET GPIO DIRECTION (VERB ID=717H) .......................................................................................................57

TABLE 69. VERB – GET GPIO UNSOLICITED RESPONSE ENABLE MASK (VERB ID=F19H) .........................................................58

TABLE 70. VERB – SET GPIO UNSOLICITED RESPONSE ENABLE MASK (VERB ID=719H)..........................................................59

TABLE 71. VERB – FUNCTION RESET (VERB ID=7FFH) ..............................................................................................................59

TABLE 72. VERB – GET DIGITAL CONVERTER CONTROL 1 & CONTROL 2 (VERB ID= F0DH, F0EH) ..........................................60

TABLE 73. VERB – SET DIGITAL CONVERTER CONTROL 1 & CONTROL 2 (VERB ID=70DH, 70EH) ............................................61

TABLE 74. VERB – GET SUBSYSTEM ID [31:0] (VERB ID=F20H/F21H/F22H/F23H) ...................................................................62

TABLE 75. VERB – SET SUBSYSTEM ID [31:0] (VERB ID=723H FOR [31:24], 722H FOR [23:16], 721H FOR [15:8], 720H FOR

[7:0]) ........................................................................................................................................................................63

TABLE 76. ABSOLUTE MAXIMUM RATINGS ................................................................................................................................64

TABLE 77. THRESHOLD VOLTAGE ...............................................................................................................................................64

TABLE 78. DIGITAL FILTER CHARACTERISTICS ...........................................................................................................................65

TABLE 79. S/PDIF INPUT/OUTPUT CHARACTERISTICS................................................................................................................65

TABLE 80. LINK RESET AND INITIALIZATION TIMING..................................................................................................................66

TABLE 81. LINK TIMING PARAMETERS AT THE CODEC ...............................................................................................................67

TABLE 82. S/PDIF OUTPUT AND INPUT TIMING ..........................................................................................................................68

TABLE 83. ANALOG PERFORMANCE ............................................................................................................................................69

TABLE 84. ORDERING INFORMATION ..........................................................................................................................................75

7.1+2 Channel High Definition Audio Codec

vii

w/Two Independent S/PDIF-OUT

Track ID: JATR-1076-21 Rev. 1.2

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