ALC888S & ALC888SDD
Datasheet
Exit from ‘Link Reset’:
s If BCLK is re-started for any reason (codec wake-up event, power management, etc.)
t Software is responsible for de-asserting RST# after a minimum of 100µs BCLK running time (the
100µsec provides time for the codec PLL to stabilize)
u Minimum of 4 BCLK after RST# is de-asserted, the controller starts to signal normal frame SYNC
v When the codec drives its SDI to request an initialization sequence (when the SDI is driven high at the
last bit of frame SYNC, it means the codec requests an initialization sequence)
Previous Frame
4 BCLK
4 BCLK
Link in Reset >=100 usec >= 4 BCLK Initialization Sequence
BCLK
SYNC
SDOs
SDIs
RST#
Normal Frame
SYNC is absent
2
Driven Low
Driven Low
Pulled Low
Pulled Low
Driven Low
Pulled Low
Pulled Low
1
3
4
5
6
Figure 14. Link Reset Timing
Normal Frame
SYNC
8
Wake Event
9
7
7.3.2. Codec Reset
A ‘Codec Reset’ is initiated via the codec RESET command verb. It results in the target codec being reset
to the default state. After the target codec completes its reset operation, an initialization sequence is
requested.
7.1+2 Channel High Definition Audio Codec
21
w/Two Independent S/PDIF-OUT
Track ID: JATR-1076-21 Rev. 1.2