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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

HD74AC182RPEL 데이터 시트보기 (PDF) - Renesas Electronics

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HD74AC182RPEL
Renesas
Renesas Electronics Renesas
HD74AC182RPEL Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
HD74AC182
Logic Symbol
P0 G0
P1 G1
P2 G2
P3 G3
G
Cn
P
Cn+x Cn+y Cn+z
Pin Names
Cn
G0, G2
G1
G3
P0, P1
P2
P3
Cn + x to Cn + z
G
P
Carry Input
Carry Generate Inputs (Active Low)
Carry Generate Input (Active Low)
Carry Generate Input (Active Low)
Carry Propagate Inputs (Active Low)
Carry Propagate Input (Active Low)
Carry Propagate Input (Active Low)
Carry Outputs
Carry Generate Output (Active Low)
Carry Propagate Output (Active Low)
Logic Diagram
Cn G0 P0
G1 P1
G2 P2
G3 P3
Cn+x
Cn+y
Cn+z
G
P
Please note that this diagram is provided only for the understanding of logic operations and should not be
used to estimate propagation delays.
Functional Description
The HD74AC182/HD74ACT182 carry lookahead generator accepts up to four pairs of Active Low Carry Propagate (P0
to P3) and Carry Generate (G0 to G3) signals and an Active High Carry input (Cn) and provides anticipated Active High
carries (Cn + x, Cn + y , Cn + z) across four groups of binary adders. The HD74AC182/HD74ACT182 also has Active Low
Carry Propagate (P) and Carry Generate (G) outputs which may be used for further level of lookahead. The logic
equations provided at the outputs are:
Rev.2.00, Jul.16.2004, page 2 of 6

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