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DAP011

PWM Current−Mode Controller for High−Power Universal Off−Line Supplies

ON Semiconductor 

DAP011/DAP011C

APPLICATION INFORMATION

Introduction

SpeedKing implements a standard current mode

architecture where the switch−off event is dictated by the

peak current setpoint. This component represents the ideal

candidate where low part−count is the key parameter,

particularly in low−cost AC/DC adapters, open−frame

power supplies etc. Due to its high voltage technology, the

DAP011/DAP011C incorporates all the necessary

components normally needed in today modern power

supply designs, bringing several enhancements such as an

adjustable EMI jittering and a fault timer.

• Current−mode operation with internal ramp

compensation: implementing peak current mode

control, the DAP011/DAP011C offers an internal ramp

compensation signal that can easily by summed up to

the sensed current. Subharmonic oscillations can thus

be fought via the inclusion of a simple resistor.

• Internal high−voltage startup switch: reaching a low

no−load standby power represents a difficult exercise

when the controller requires an external, lossy, resistor

connected to the bulk capacitor. Thanks to an internal

logic, the controller disables the high−voltage current

source after startup which no longer hampers the

consumption in no−load situations.

• EMI jittering: a dedicated pin offers the ability to vary

the pace at which the oscillator frequency is modulated.

This helps spreading out energy in conducted noise

analysis.

• Skip−cycle capability: a continuous flow of pulses in

not compatible with no−load standby power

requirements. Slicing the switching pattern in bunch of

pulses drastically reduces overall losses but can, in

certain cases, bring acoustic noise in the transformer.

Thanks to a skip operation taking place at low peak

currents only, no mechanical noise appears in the

transformer. Also, activating the soft−start during skip

cycle brings so−called SoftSkip benefits, greatly

reducing acoustical noise in the transformer.

• Internal soft−start: a soft−start precludes the main

power switch from being stressed upon startup. Its

duration is equal to 10% of the fault timer, e.g. 10ms

for a 100 ms timer duration.

• Latch input: by monitoring pin 2, the controller detects

when it is brought above a latching level via a zener

(OVP) or a NTC (OTP), or both. When the latch is

detected, all pulses are permanently disabled and VCC

goes up and down, maintaining the latch condition.

When the user cycles VCC below 5.0 V, the controller

gets reset and attempts to restart.

• Short−circuit protection: short−circuit and especially

over−load protection are difficult to implement when a

strong leakage inductance between auxiliary and power

windings affects the transformer (the auxiliary winding

level does not properly collapse in presence of an

output short). Here, every time the internal 1.0 V

maximum peak current limit is activated, an error flag,

Ip Flag, is asserted and a time period starts, thanks to an

adjustable timer. If the timer reaches completion while

the error flag is still present, the controller stops the

pulses and goes into a latch−off phase, operating in a

low−frequency burst−mode. To limit the fault output

power, a divide−by−two circuitry is installed on the

VCC pin and requires twice a startup sequence before

another attempt to restart is. As soon as the fault

disappears, the SMPS resumes operation. The latch−off

phase can also be initiated, more classically, when VCC

drops below VCC(min) (9.0 V typical).

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