Table 5. AUXR1: Auxiliary Register 1
TS80C54X2/C58X2
TS87C54X2/C58X2
7
6
5
4
3
2
1
0
-
-
-
-
GF3
-
-
DPS
Bit
Number
7
6
5
4
3
2
1
0
Bit
Mnemonic
Description
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
GF3
Reserved
This bit is a general purpose user flag
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Data Pointer Selection
DPS
Clear to select DPTR0.
Set to select DPTR1.
User software should not write 1s to reserved bits. These bits may be used in future 8051 family products to invoke new feature. In that case, the reset
value of the new bit will be 0, and its active value will be 1. The value read from a reserved bit is indeterminate.
Application
Software can take advantage of the additional data pointers to both increase speed and reduce code size, for
example, block operations (copy, compare, search ...) are well served by using one data pointer as a ’source’
pointer and the other one as a "destination" pointer.
Rev. B - Aug. 31, 1999
11