CHAPTER 3 CPU ARCHITECTURE
(3) Stack pointer (SP)
This is a 16-bit register to hold the start address of the memory stack area. Only the internal high-speed
RAM area can be set as the stack area.
Figure 3-9. Stack Pointer Configuration
15
0
SP SP15 SP14 SP13 SP12 SP11 SP10 SP9 SP8 SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0
The SP is decremented ahead of writing (saving) to the stack memory and is incremented after reading
(restoring) from the stack memory.
Each stack operation saves/restores data as shown in Figures 3-10 and 3-11.
Caution Since RESET input makes SP contents undefined, be sure to initialize the SP before
instruction execution.
Figure 3-10. Data to be Saved to Stack Memory
SP SP _ 2
SP _ 2
SP _ 1
SP
PUSH rp
instruction
Register pair
lower
Register pair
higher
SP SP _ 2
SP _ 2
SP _ 1
SP
CALL, CALLT
instructions
SP SP _ 3
SP _ 3
PC7 to PC0
SP _ 2
PC15 to PC8
SP _ 1
SP
Interrupt
PC7 to PC0
PC15 to PC8
PSW
Figure 3-11. Data to be Restored from Stack Memory
POP rp
instruction
RET instruction
RETI instruction
SP
SP + 1
SP SP + 2
Register pair
lower
Register pair
higher
SP
SP + 1
SP SP + 2
PC7 to PC0
PC15 to PC8
SP
SP + 1
SP + 2
SP SP + 3
PC7 to PC0
PC15 to PC8
PSW
User’s Manual 2nd edition
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