CXD8060Q 데이터 시트보기 (PDF) - Sony Semiconductor
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CXD8060Q Datasheet PDF : 4 Pages
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CXD8060Q (3/4)
INPUT
ADR
CK
CKD
CKX
CS
MDL
OB2S
OEM
OEP
RCL0
RCL1
RDM
RDP0, RDP1
RST
TST0 - TST3
; SERIAL ADDRESS
; SYSTEM CLOCK
; SERIAL INTERFACE CLOCK
; SWITCHING TIMING PULSE
; CHIP SELECT
; M OUTPUT DELAY CONTROL
(HIGH : NORMAL, LOW : 2CK DELAY MODE)
; OFFSET BINARY/2'S COMPLEMENT SELECT
(HIGH : 2'S COMPLEMENT, LOW : OFFSET BINARY)
; M OUT ENABLE
(LOW : ENABLE)
; P OUT ENABLE
(LOW : ENABLE)
; REGISTER CLEAR
(HIGH : NORMAL, LOW : SET A AND B DATA TO 0)
; REGISTER CLEAR
(HIGH : NORMAL, LOW : SET C DATA TO 0)
; ROUNDING M OUT (HIGH)/DISCARD M OUT SELECT (LOW)
; ROUNDING P OUT (HIGH)/DISCARD P OUT SELECT (LOW)
; RESET PULSE
(LOW : SET DIO TERMINAL TO FIXED INPUT MODE0)
; FUNCTION MODE SELECT
TST3 TST2 TST1 TST0
FUNCTION MODE
TIO TERMINAL I/O STATUS
1
1
1
0
1
M=
(X–A)2 + (Y–B)2, P = tan–1
Y–B
X–A
+C
OUTPUT : (X–A)2 + (Y–B)2
OUTPUT : X–A / Y–B ,
A, B, C : SERIAL DATA
Y–B / X–A
0
0
0
X
M=
(X–A)2 + (Y–B)2, P = tan–1
Y–B
X–A
+C
INPUT (A AND B DATA)
A, B : TIO INPUT, C : SERIAL DATA
0
1
1
X
M=
(X–A)2 + (Y–B)2, P = tan–1
Y–B
X–A
+C
INPUT (C DATA)
A, B : SERIAL DATA, C : TIO INPUT
0 0 1 X M= R
R : TIO INPUT
1 1 0 X M = tan–1D D : TIO INPUT
INPUT (R)
INPUT (D)
X ; DON'T CARE
X0 - X9, XA - XC
Y0 - Y9, YA - YC
; 11.2-BIT DIGITAL IN
; 11.2-BIT DIGITAL IN
OUTPUT
ML, M0 - M9, MA - MD
PL, P0 - P9, PA - PD
; 11.4-BIT DIGITAL OUT (RADIUS DATA)
; 15-BIT DIGITAL OUT (ANGLE DATA)
INPUT/OUTPUT
DIO
; SERIAL DATA
TIO0 - TIO9, TIOA - TIOP ; TEST
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