T24C16A 데이터 시트보기 (PDF) - Unspecified

부품명

상세내역

일치하는 목록

T24C16A

T24C0XA, T24C02A EEPROM

Unspecified 







Pin Descriptions

DEVICE/PAGE ADDRESSES (A2, A1 and A0): The A2, A1 and A0 pins are device address inputs

that are hard wired for the T24C02A. Eight 2K devices may be addressed on a single bus system

(device addressing is discussed in detail under the Device Addressing section).

The T24C04A uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices may

be addressed on a single bus system. The A0 pin is a no connect and can be connected to ground.

The T24C08A only uses the A2 input for hardwire addressing and a total of two 8K devices may be

addressed on a single bus system. The A0 and A1 pins are no connects and can be connected to

ground.

The T24C16A does not use the device address pins, which limits the number of devices on a single

bus to one. The A0, A1 and A2 pins are no connects and can be connected to ground.

SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain

driven and may be wire-ORed with any number of other open-drain or open- collector devices.

SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM

device and negative edge clock data out of each device.

WRITE PROTECT (WP): The T24C02A/T24C04A/T24C08A/T24C16A has a Write Protect pin

that provides hardware data protection. The Write Protect pin allows normal read/write operations

when connected to ground (GND). When the Write Protect pin is connected to VCC, the write

protection feature is enabled and operates as shown in the following Table 2.

Table 2: Write Protect

WP Pin Status

At VCC

At GND

T24C02A

Full (2K) Array

Part of the Array Protected

T24C04A

T24C08A

Full (4K) Array Full (8K) Array

Normal Read/Write Operations

T24C16A

Full (16K) Array

Memory Organization

T24C02A, 2K SERIAL EEPROM: Internally organized with 32 pages of 8 bytes each, the 2K

requires an 8-bit data word address for random word addressing.

T24C04A, 4K SERIAL EEPROM: Internally organized with 32 pages of 16 bytes each, the 4K

requires a 9-bit data word address for random word addressing.

T24C08A, 8K SERIAL EEPROM: Internally organized with 64 pages of 16 bytes each, the 8K

requires a 10-bit data word address for random word addressing.

T24C16A, 16K SERIAL EEPROM: Internally organized with 128 pages of 16 bytes each, the 16K

requires an 11-bit data word address for random word addressing.

Device Operation

CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device.

Data on the SDA pin may change only during SCL low time periods (see to Figure 1 on page 5). Data

changes during SCL high periods will indicate a start or stop condition as defined below.

START CONDITION: A high-to-low transition of SDA with SCL high is a start condition which

G

G

G

GG

G

www.ic-GjiGaG GzGhG Gi.coG mG G G TG el:G400G 66G0 8G3G8G G2G G G G G G G G G G G G G G G G G G G G G G G G

G

GG

Share Link: