LC4064ZE 데이터 시트보기 (PDF) - Lattice Semiconductor
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LC4064ZE Datasheet PDF : 54 Pages
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Lattice Semiconductor
ispMACH 4000ZE Family Data Sheet
Table 6. GLB/MC/ORP Combinations for ispMACH 4128ZE
GLB/MC
[GLB] [MC 0]
[GLB] [MC 1]
[GLB] [MC 2]
[GLB] [MC 3]
[GLB] [MC 4]
[GLB] [MC 5]
[GLB] [MC 6]
[GLB] [MC 7]
[GLB] [MC 8]
[GLB] [MC 9]
[GLB] [MC 10]
[GLB] [MC 11]
ORP Mux Input Macrocells
M0, M1, M2, M3, M4, M5, M6, M7
M1, M2, M3, M4, M5, M6, M7, M8
M2, M3, M4, M5, M6, M7, M8, M9
M4, M5, M6, M7, M8, M9, M10, M11
M5, M6, M7, M8, M9, M10, M11, M12
M6, M7, M8, M9, M10, M11, M12, M13
M8, M9, M10, M11, M12, M13, M14, M15
M9, M10, M11, M12, M13, M14, M15, M0
M10, M11, M12, M13, M14, M15, M0, M1
M12, M13, M14, M15, M0, M1, M2, M3
M13, M14, M15, M0, M1, M2, M3, M4
M14, M15, M0, M1, M2, M3, M4, M5
Table 7. GLB/MC/ORP Combinations for ispMACH 4032ZE and 4064ZE
GLB/MC
[GLB] [MC 0]
[GLB] [MC 1]
[GLB] [MC 2]
[GLB] [MC 3]
[GLB] [MC 4]
[GLB] [MC 5]
[GLB] [MC 6]
[GLB] [MC 7]
[GLB] [MC 8]
[GLB] [MC 9]
[GLB] [MC 10]
[GLB] [MC 11]
[GLB] [MC 12]
[GLB] [MC 13]
[GLB] [MC 14]
[GLB] [MC 15]
ORP Mux Input Macrocells
M0, M1, M2, M3, M4, M5, M6, M7
M1, M2, M3, M4, M5, M6, M7, M8
M2, M3, M4, M5, M6, M7, M8, M9
M3, M4, M5, M6, M7, M8, M9, M10
M4, M5, M6, M7, M8, M9, M10, M11
M5, M6, M7, M8, M9, M10, M11, M12
M6, M7, M8, M9, M10, M11, M12, M13
M7, M8, M9, M10, M11, M12, M13, M14
M8, M9, M10, M11, M12, M13, M14, M15
M9, M10, M11, M12, M13, M14, M15, M0
M10, M11, M12, M13, M14, M15, M0, M1
M11, M12, M13, M14, M15, M0, M1, M2
M12, M13, M14, M15, M0, M1, M2, M3
M13, M14, M15, M0, M1, M2, M3, M4
M14, M15, M0, M1, M2, M3, M4, M5
M15, M0, M1, M2, M3, M4, M5, M6
Output Enable Routing Multiplexers
The OE Routing Pool provides the corresponding local output enable (OE) product term to the I/O cell.
I/O Cell
The I/O cell contains the following programmable elements: output buffer, input buffer, OE multiplexer, Power Guard
and bus maintenance circuitry. Figure 8 details the I/O cell.
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