MAX1203ACAP-T(1998) 데이터 시트보기 (PDF) - Maxim Integrated
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MAX1203ACAP-T
(Rev.:1998)
(Rev.:1998)
Maxim Integrated
MAX1203ACAP-T Datasheet PDF : 24 Pages
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5V, 8-Channel, Serial, 12-Bit ADCs
with 3V Digital Interface
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +5V ±5%, VL = 2.7V to 3.6V; VSS = 0V or -5V ±5%; fSCLK = 2.0MHz, external clock (50% duty cycle); 15 clocks/conversion
cycle (133ksps); MAX1202—4.7µF capacitor at REF pin; MAX1203—external reference, VREF = 4.096V applied to REF pin;
TA = TMIN to TMAX; unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
CONVERSION RATE
Conversion Time (Note 5)
Internal clock
5.5
tCONV External clock, 2MHz, 12 clocks/conversion
6
10
µs
Track/Hold Acquisition Time
Aperture Delay
tACQ
1.5
µs
10
ns
Aperture Jitter
<50
ps
Internal Clock Frequency
1.7
MHz
External compensation mode, 4.7µF
0.1
2.0
External Clock Frequency Range
Internal compensation mode (Note 6)
0.1
0.4 MHz
Used for data transfer only
0
2.0
ANALOG INPUT
Input Voltage Range, Single-
Ended and Differential (Note 7)
Multiplexer Leakage Current
Input Capacitance
Unipolar, VSS = 0V
Bipolar, VSS = -5V
On/off leakage current, VCH_ = ±5V
(Note 6)
VREF
V
±VREF / 2
±0.01 ±1
µA
16
pF
INTERNAL REFERENCE (MAX1202 only, reference-buffer enabled)
REF Output Voltage
REF Short-Circuit Current
TA = +25°C
4.076 4.096 4.116
V
30
mA
MAX1202AC
±30 ±50
VREF Temperature Coefficient
MAX1202AE
MAX1202B
±30 ±60 ppm/°C
±30
Load Regulation (Note 8)
0mA to 0.5mA output load
2.5
mV
Internal compensation mode
0
Capacitive Bypass at REF
µF
External compensation mode
4.7
Capacitive Bypass at REFADJ
0.01
µF
REFADJ Adjustment Range
EXTERNAL REFERENCE AT REF (Reference buffer disabled, VREF = 4.096V)
±1.5
%
Input Voltage Range
2.50
VDD +
50mV
V
Input Current
Input Resistance
REF Input Current in Shutdown
SHDN = 0V
200
350
µA
12
20
kΩ
1.5
10
µA
REFADJ Buffer Disable Threshold
VDD -
50mV
V
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