LH28F016SA 데이터 시트보기 (PDF) - Sharp Electronics
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LH28F016SA Datasheet PDF : 36 Pages
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LH28F016SA
16M (1M × 16, 2M × 8) Flash Memory
The LH28F016SA incorporates an Automatic Power
Saving (APS) feature which substantially reduces the
active current when the device is in static mode of
operation (addresses not switching).
In APS mode, the typical ICC current is 2 mA at
5.0 V (1 mA at 3.3 V).
A Deep Power-Down mode of operation is invoked
when the RP » (called PWD on the LH28F008SA) pin
transitions low. This mode brings the device power con-
sumption to less than 5 µA, typically, and provides addi-
tional write protection by acting as a device reset pin
during power transitions. A reset time of 400 ns
(VCC = 5.0 V ± 0.25 V system) is required from RP »
switching high until outputs are again valid. In the Deep
Power-Down state, the WSM is reset (any current
operation will abort) and the CSR, GSR and BSR regis-
ters are cleared.
A CMOS Standby mode of operation is enabled when
either CE0» or CE1» transitions high and RP» stays high with
all input control pins at CMOS levels. In this mode, the
device typically draws an ICC standby current of 10 µA.
MEMORY MAP
1FFFFFH
1F0000H
1EFFFFH
1E0000H
1DFFFFH
1D0000H
1CFFFFH
1C0000H
1BFFFFH
1B0000H
1AFFFFH
1A0000H
19FFFFH
190000H
18FFFFH
180000H
17FFFFH
170000H
16FFFFH
160000H
15FFFFH
150000H
14FFFFH
140000H
13FFFFH
130000H
12FFFFH
120000H
11FFFFH
110000H
10FFFFH
100000H
0FFFFFH
0F0000H
0EFFFFH
0E0000H
0DFFFFH
0D0000H
0CFFFFH
0C0000H
0BFFFFH
0B0000H
0AFFFFH
0A0000H
09FFFFH
090000H
08FFFFH
080000H
07FFFFH
070000H
06FFFFH
060000H
05FFFFH
050000H
04FFFFH
040000H
03FFFFH
030000H
02FFFFH
020000H
01FFFFH
010000H
00FFFFH
000000H
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28F016SAT-3
Figure 3. LH28F016SA Memory Map
(Byte-Wide Mode)
6
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