LC8220 데이터 시트보기 (PDF) - SANYO -> Panasonic

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LC8220

JPEG Still Color Image Compression/Decompression LSI

SANYO -> Panasonic 

Pin Functions

Pin No.

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

Symbol

VSS

CTLCS

CTLRD

CTLWR

CTLRDY

CTLERR

CTLINT

CPUCTL

CTLSIZE

VDD

VSS

CTLA7

CTLA6

CTLA5

CTLA4

CTLA3

CTLA2

CTLA1

CTLA0

VDD

VSS

CTLD15

CTLD14

CTLD13

CTLD12

CTLD11

CTLD10

CTLD9

CTLD8

VDD

VSS

CTLD7

CTLD6

CTLD5

CTLD4

CTLD3

CTLD2

CTLD1

CTLD0

VDD

VSS

CLK

CLKSEL

RESET

TEST

TESTOUT

MDD10

MDD9

MDD8

VDD

VSS

MDD7

MDD6

MDD5

LC8220

I/O

Function

— Ground

I Control bus chip select*2

I Control bus read request*3

I Control bus write request*4

O Control bus ready for read/write requests*5

O Error interrupt request

O Control bus interrupt request

I Connected CPU type setting for the control bus*1

I Bus width selection for the control bus (0: 8 bits, 1: 16 bits)

— +5 V power supply

— Ground

I

I

I

I

Control address bus

I

I

I

I

— +5 V power supply

— Ground

I/O

I/O

I/O

I/O

Control data bus (D15 to D8 are unused if an 8-bit CPU is used.*7)

I/O

I/O

I/O

I/O

— +5 V power supply

— Ground

I/O

I/O

I/O

I/O

Control data bus

I/O

I/O

I/O

I/O

— +5 V power supply

— Ground

I System clock

I Clock divisor selection (0: no divisor, 1: divisor used)*6

I System reset

I Test mode selection (0: normal operation, 1: test mode)*6

O Test result output*8

I/O

I/O Test mode data bus*7

I/O

— +5 V power supply

— Ground

I/O

I/O Test mode data bus*7

I/O

Continued on next page.

No. 4909-3/13

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