HEF4543B 데이터 시트보기 (PDF) - NXP Semiconductors.

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HEF4543B

BCD to 7-segment latch/decoder/driver

NXP Semiconductors. 

NXP Semiconductors

HEF4543B

BCD to 7-segment latch/decoder/driver

Table 7. Dynamic characteristics …continued

VSS = 0 V; Tamb = 25 °C; For test circuit see Figure 7;unless otherwise specified.

Symbol Parameter

Conditions

VDD

Extrapolation formula[1]

th

hold time

Dn to LE;

see Figure 6

5V

10 V

15 V

tW

pulse width

pin LE HIGH;

minimum width;

see Figure 6

5V

10 V

15 V

Min Typ Max Unit

0 −15 -

ns

15

0-

ns

20

5-

ns

60

30 -

ns

30

15 -

ns

20

10 -

ns

[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).

Table 8. Dynamic power dissipation PD

PD can be calculated from the formulas shown. VSS = 0 V; tr = tf ≤ 20 ns; Tamb = 25 °C.

Symbol Parameter

VDD

Typical formula for PD (µW)

where:

PD

dynamic power 5 V

PD = 2200 × fi + Σ(fo × CL) × VDD2

fi = input frequency in MHz,

dissipation

10 V

PD = 10400 × fi + Σ(fo × CL) × VDD2

fo = output frequency in MHz,

15 V

PD = 33000 × fi + Σ(fo × CL) × VDD2

CL = output load capacitance in pF,

VDD = supply voltage in V,

Σ(CL × fo) = sum of the outputs.

12. Waveforms

VI

LE

VSS

VM

VM

VI

D2

VM

VSS

VI

LT

VSS

VI

BL

VSS

VOH 90 %

Qg

VOL

tTHL

tPHL

VM

10 %

tPLH

tTLH

tPHL

Conditions: D3 = LOW and D0 = D1 =HIGH.

Fig 5. Propagation delays and output transitions times

VM

tPLH

tPHL

tPLH

HEF4543B_5

Product data sheet

Rev. 05 — 27 October 2009

tPHL

tPLH

001aaj496

© NXP B.V. 2009. All rights reserved.

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