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L24C16-SE 데이터 시트보기 (PDF) - Unspecified

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L24C16-SE Datasheet PDF : 17 Pages
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Tel:86-755-8835 3502/03/04
Website:http://www.lizhiic.com
Fax:86-755-8835 3509
Pin Descriptions
DEVICE/PAGE ADDRESSES (A2, A1 and A0): The A2, A1 and A0 pins are device address inputs
that are hard wired for the L24C02B. Eight 2K devices may be addressed on a single bus system
(device addressing is discussed in detail under the Device Addressing section).
The L24C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices may
be addressed on a single bus system. The A0 pin is a no connect and can be connected to ground.
The L24C08B only uses the A2 input for hardwire addressing and a total of two 8K devices may be
addressed on a single bus system. The A0 and A1 pins are no connects and can be connected to
ground.
The L24C16 does not use the device address pins, which limits the number of devices on a single bus
to one. The A0, A1 and A2 pins are no connects and can be connected to ground.
SERIAL DATA (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain
driven and may be wire-ORed with any number of other open-drain or open- collector devices.
SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM
device and negative edge clock data out of each device.
WRITE PROTECT (WP): The L24C02B/L24C04/L24C08B/L24C16 has a Write Protect pin that
provides hardware data protection. The Write Protect pin allows normal read/write operations when
connected to ground (GND). When the Write Protect pin is connected to VCC, the write protection
feature is enabled and operates as shown in the following Table 2.
Table 2: Write Protect
WP Pin Status
At VCC
At GND
L24C02B
Full (2K) Array
Part of the Array Protected
L24C04
L24C08B
Full (4K) Array Full (8K) Array
Normal Read/Write Operations
L24C16
Full (16K) Array
Memory Organization
L24C02B, 2K SERIAL EEPROM: Internally organized with 32 pages of 8 bytes each, the 2K
requires an 8-bit data word address for random word addressing.
L24C04, 4K SERIAL EEPROM: Internally organized with 32 pages of 16 bytes each, the 4K
requires a 9-bit data word address for random word addressing.
L24C08B, 8K SERIAL EEPROM: Internally organized with 64 pages of 16 bytes each, the 8K
requires a 10-bit data word address for random word addressing.
L24C16, 16K SERIAL EEPROM: Internally organized with 128 pages of 16 bytes each, the 16K
requires an 11-bit data word address for random word addressing.
Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device.
Data on the SDA pin may change only during SCL low time periods (see to Figure 1 on page 5). Data
changes during SCL high periods will indicate a start or stop condition as defined below.
Shenzhen LIZE Electronic Technology Co., Ltd
Version: 2.0
Date: 15, Apr. 2010
Page: 4 of 16
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