ICE3BR4765JZ 데이터 시트보기 (PDF) - Infineon Technologies

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ICE3BR4765JZ

Off-Line SMPS Current Mode Controller with integrated 650V CoolMOS® and Startup cell (frequency jitter Mode) in DIP-7

Infineon Technologies 

ICE3BR4765JZ

Schematic for recommended PCB layout

b. Spark Gap 1 and Spark Gap 2, Live / Neutral to GROUND:

These 2 Spark Gaps can be used when the lightning surge requirement is >6KV.

230Vac input voltage application, the gap separation is around 5.5mm

115Vac input voltage application, the gap separation is around 3mm

2. Add Y-capacitor (C2 and C3) in the Live and Neutral to ground even though it is a 2-pin input

3. Add negative pulse clamping diode, D11 to the Current sense resistor, R12:

The negative pulse clamping diode can reduce the negative pulse going into the CS pin of the CoolSET® and

reduce the abnormal behavior of the CoolSET®. The diode can be a fast speed diode such as IN4148.

The principle behind is to drain the high surge voltage from Live/Neutral to Ground without passing through the

sensitive components such as the primary controller, IC11.

Version 2.1

30

30 Aug 2011

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