DC and AC Electrical Characteristics (Cont’d): (VCC = 12V, TA = +25°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min Typ Max Unit
Pulse Duration Switch (t = 0, V3–16 = 0 or Input Pin4 Open)
Input Voltage
V4–16
Input Current
I4
Vertical Sync Pulse (Positive–Going)
5.4
–
6.6
V
–
0
0
µA
Output Voltage (Peak–to–Peak Value)
Output Resistance
Delay Between Leading Edge of Input
and Output Signal
V8–16(P–P)
R8
tON
10
11
–
2
–
15
–
V
–
kΩ
–
µs
Delay Between Trailing Edge of Input tOFF
and Output Signal
–
tON
–
µs
Burst Gating Pulse (Positive–Going)
Output Voltage (Peak–to–Peak Value)
Output Resistance
Pulse Duration
V7–16(P–P)
R7
tp
V7–16 = 7V
10
11
–
V
–
70
–
Ω
–
4.0
–
µs
3.7 4.3
–
µs
Phase Relation Between Middle of Sync
t
V7–16 = 7V
Pulse at the Input and the Leading
Edge of the Burst Gating Pulse
2.15 2.65 3.15 µs
Output Trailing Edge Current
I7
Line Flyback–Blanking Pulse (Positive–Going)
–
2
–
mA
Output Voltage (Peak–to–Peak Value) V7–16(P–P)
Output Resistance
R7
Output Trailing Edge Current
I7
Line Drive Pulse (Positive–Going)
4
5
–
V
–
70
–
Ω
–
2
–
mA
Output Voltage (Peak–to–Peak Value) V3–16(P–P)
Output Resistance for Leading Edge of
R3
Line Pulse
– 10.5 –
V
–
2.5
–
Ω
Output Resistance for Trailing Edge of
R3
Line Pulse
–
20
–
Ω
Pulse Duration (Thyristor Driving)
Pulse Duration (Transistor Driving)
tp
V4–16 = 9.4 to V1–16V
5.5 7.0 8.5 µs
tp
V4–16 = 0 to 4V, tFP = 12µs,
– 14 + tD –
µs
Note 2
Supply Voltage for Switching OFF the
Output Pulse
V1–16
–
4
–
V
Overall Phase Relation
Phase Relation Between Middle of Sync
t
Note 3
Pulse and the Middle of the Flyback
Pulse
–
2.6
–
µs
Tolerance of Phase Relation
|∆t|
–
–
0.7 µs
The Adjustment of the Overall Phase
Relation and Consequently the
Leading Edge of the Line Drive Oc-
curs Automatically by Phase Con-
trol ϕ2. If Additional Adjustment is
Applied it can be Arranged by Cur-
rent Supply at Pin5.
∆I5/∆t
–
30
– µA/µs
Note 2. tD = Switch–OFF Delay of Line Output Stage.
Note 3. Line Flyback Pulse Duration tFP = 12µs.