LH543620M-20 데이터 시트보기 (PDF) - Sharp Electronics

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LH543620M-20

1024 × 36 Synchronous FIFO

Sharp Electronics 

1024 × 36 Synchronous FIFO

LH543620

PIN DESCRIPTIONS (FUNCTIONAL)

PIN NAME

DESCRIPTION

D[35:0]

Q[35:0]

DATABUS

36-bit Input-Port Databus. The D port is the input port for the FIFO memory array, the resource

registers, and the mailbox, or it may be directly connected to the output port. See Figure 4.

D[35:0] is synchronous to the rising edge of CKI.

Three-State 36-Bit Output-Port Databus. The Q port is the output port for the FIFO memory array,

the resource registers, and the mailbox, or it may be directly connected to the input port. See Figure

4. Q[35:0] is synchronous to the rising edge of CKO. The lower 16 bits of the Q port (Q[15:0]) may

also be used as the input port for the resource register.

CKI

CKO

CLOCKS

Input-Port Clock. CKI is a free-running waveform controlled by an oscillator. It may be irregular or

asynchronous if minimum clock-HIGH times and clock-LOW times are met.

Output-Port Clock. CKO is a free-running waveform controlled by an oscillator. It may be irregular

or asynchronous if minimum clock-HIGH times and clock-LOW times are met.

INPUT PORT

SELECT INPUT

PORT FUNCTION

ADI [2:0] =

RESOURCE

MAILBOX REGISTER

OUTPUT PORT

SELECT OUTPUT

PORT FUNCTION

ADO [2:0] =

MAILBOX

RESOURCE

REGISTER

D → MAILBOX

MFF = L

MEF = H

L

CAPR

H

D → RESOURCE

REGISTER (ADI)

IDLE

MAILBOX → Q

MFF = H

MEF = L

L

OE

H

RESOURCE

REGISTER (ADO) → Q

L

CAPR

H

* All the operations are synchronized to CKI,

except MEF is set HIGH on CKO.

IDLE

Q → RESOURCE

REGISTER (ADO)

* All the operations are synchronized to CKO,

except MFF is set HIGH on CKI.

Figure 4. Resource Registers, Read and Write

543620-5

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