LH543620M-25 데이터 시트보기 (PDF) - Sharp Electronics

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LH543620M-25

1024 × 36 Synchronous FIFO

Sharp Electronics 

1024 × 36 Synchronous FIFO

TIMING DIAGRAMS

RS

EF, AE

FF, HF,

AF, PF

Q[35:0]

t RS

t RF

t RF

t RO

ENI1, ENI2,

ENO1, ENO2

tRSR

OE = HIGH1

OE = LOW

ADI[2:0]3

ADO[2:0]

NOTES:

1. After reset, the outputs will be LOW if OE = LOW, and in a high-impedance

state if OE = HIGH.

2. The clocks (CKI, CKO) may be free-running during a reset operation.

3. If CAPR = L, then ADO = XXX and ADI must be = H,H,H for proper reset.

If CAPR = H, then ADI = XXX and ADO must be = H,H,H for proper reset.

Figure 9. Reset Timing

LH543620

543620-15

21

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