L5510 데이터 시트보기 (PDF) - STMicroelectronics

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L5510

HIGHLY INTEGRATED, AUTOMATED SINGLE-CHIP DRIVE MANAGER AND DISK DRIVE CONTROLLER

STMicroelectronics 

L5510

7 Other Features

■ 208-pin QFP package

■ Automatic and programmed power-down

modes

■ 3.3 V I/Os with 5 V tolerance, 2.5 V logic core

■ Programmable read channel and preamp VCM

serial interfaces

■ Dual on-chip frequency synthesizers optimize

DSP, servo, Ultra-DMA and buffer performance

■ General purpose I/O and PWM pins

■ Programmable baud-rate RS232 interface

8 DESCRIPTION

The Device is a highly integrated, automated sin-

gle-chip Drive Manager and Disk Drive Controller

IC designed for high-performance, headerless

ATA drive applications. Figure 2 shows the chip’s

main functional blocks.

Figure 2. Functional Block Diagram

BUFFER

SDRAM

ATA BUS

FLASH

ROM

(SYNC or

ASYNC)

SRAM

BCTL

DCTL

HIF

ROM

RAM

DSP

EDAC

SERVO

PERIPHERALS

READ

CHANNEL

Table 2. Revision History

Date

Revision

December 2004

1

First Issue

Description of Changes

2/3

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