P1012 데이터 시트보기 (PDF) - Freescale Semiconductor
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P1012 Datasheet PDF : 2 Pages
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The QorIQ P1012 and P1021 processors
integrate a rich set of interfaces, including
SerDes, Gigabit Ethernet, QUICC Engine
module, PCI Express® and USB. The three
10/100/1000 Ethernet ports support advanced
packet parsing, flow control and quality
of service features, as well as IEEE® 1588
time stamping—all ideal for managing the
datapath traffic between the LAN and WAN
interface. The QUICC Engine module provides
UTOPIA-L2, TDM and 10/100 Ethernet
interfaces as well as a programmable RISC
engine to offload protocol termination from
the main CPU cores. Four SerDes lanes can
be portioned across two PCI Express ports
and two SGMII ports. The PCI Express ports
can provide connectivity to IEEE 802.11n
radio cards for wireless support. USB or SD/
MMC interfaces can be used to support local
storage. Multiple memory connection ports
are available, including the 16-bit local bus,
a USB 2.0 controller, enhanced secure digital
host controller (eSDHC) and serial peripheral
interface (SPI).
Target Applications
The P1012 and P1021 processors serve
a wide variety of applications and are well
suited for various combinations of data plane
and control plane workloads in networking
and telecom applications. With an available
junction temperature range of -40ºC to
+125ºC, the devices can be used in power-
sensitive defense and industrial applications,
and outdoor environments less protected
from the environment. The devices primarily
target applications such as networking and
telecom linecards.
A multi-service router or business gateway
requires a combination of high performance
and a rich set of peripherals to support the
datapath throughputs and required system
functionality. The P1012 and P1021 devices
offer a scalable platform to develop a range
of products that can support the same feature
set. The QUICC Engine module, as well as
integrated 10/100/1000 Ethernet controllers
with classification and QoS capabilities,
are ideal for managing the datapath traffic
between the LAN and WAN interface. PCI
Express ports can provide connectivity to
IEEE 802.11n radio cards for wireless support,
TDM for legacy phone interfaces to support
voice and the USB or SD/MMC interfaces
can be used to support local storage. The
integrated security engine can provide
encrypted secure communications for remote
users with VPN support.
Technical Specifications
• Single (P1012) and dual (P1021) high-
performance Power Architecture e500 cores
36-bit physical addressing
Double-precision floating-point support
32 KB L1 instruction cache and 32 KB L1
data cache for each core
533 MHz to 800 MHz core clock
frequency
• 256 KB L2 cache with ECC, also
configurable as SRAM and stashing memory
• Three 10/100/1000 Mbps enhanced three-
speed Ethernet controllers (eTSECs)
TCP/IP acceleration and classification
capabilities
IEEE 1588 support
Lossless flow control
RGMII, SGMII
• High-speed interfaces (not all available
simultaneously)
Four SerDes to 3.125 GHz multiplexed
across controllers
Two PCI Express controllers
Two SGMII interfaces
• QUICC Engine module
UTOPIA-L2
Up to two 10/100 Ethernet interfaces
Up to four T1/E1/J1/E3 or DS-3 serial
interfaces
Up to four HDLC interfaces with 128
channels of HDLC
Up to four BISYNC interfaces
Up to four UART interfaces
SPI interfaces
GPIO
• High-Speed USB controllers (USB 2.0)
Host and device support
Enhanced host controller interface (EHCI)
ULPI interface to PHY
• Enhanced secure digital host controller
• Serial peripheral interface
• Integrated security engine (SEC 3.3)
Crypto algorithm support includes 3DES,
AES, RSA/ECC, MD5/SHA, ARC4,
Snow 3G and FIPS deterministic RNG
Single pass encryption/message
authentication for common security
protocols (IPsec, SSL, SRTP, WiMAX)
XOR acceleration
• 32-bit DDR2/DDR3 SDRAM memory
controller with ECC support
• Programmable interrupt controller (PIC)
compliant with OpenPIC standard
• Four-channel DMA controller
• Two I2C controllers, DUART, timers
• Enhanced local bus controller (eLBC)
• 16 general-purpose I/O signals
• Package: 689-pin wirebond power-BGA
(TEPBGA2)
QorIQ Platform
P1
P1
P1
P1
P2
P2
Device Cores Top Core Frequency L2 Size DDR 2/3 Support GE Ports
P1011 1
800 MHz
256 KB 32-bit with ECC 3
P1020 2
800 MHz
256 KB 32-bit with ECC 3
P1012 1
800 MHz
256 KB 32-bit with ECC 3
P1021 2
800 MHz
256 KB 32-bit with ECC 3
P2010 1
1200 MHz
512 KB 64-bit with ECC 3
P2020 2
1200 MHz
512 KB 64-bit with ECC 3
QUICC Engine
N/A
N/A
Yes
Yes
N/A
N/A
SerDes PCI Express® Serial RapidIO®
TDM
4
2
N/A
Yes
4
2
N/A
Yes
4
2
N/A
In QUICC Engine
4
2
N/A
In QUICC Engine
4
3
2
N/A
4
3
2
N/A
Learn More:
For current information about Freescale
products and documentation, please visit
freescale.com/QorIQ.
Freescale, the Freescale logo, PowerQUICC and QorIQ are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. &
Tm. Off. QUICC Engine is a trademark of Freescale Semiconductor, Inc. All other product or service names are the property
of their respective owners. The Power Architecture and Power.org word marks and the Power and Power.org logos and
related marks are trademarks and service marks licensed by Power.org. © 2009, 2011 Freescale Semiconductor, Inc.
Document Number: QORIQP1021FS
REV 1
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