HD74LS123FPEL 데이터 시트보기 (PDF) - Renesas Electronics
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HD74LS123FPEL Datasheet PDF : 9 Pages
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HD74LS123
Pin Arrangement
1A 1
1B 2
1CLR 3
1Q 4
2Q 5
2Cext 6
2Rext/Cext 7
GND 8
CLR
QQ
QQ
CLR
16 VCC
15 1Rext/Cext
14 1Cext
13 1Q
12 2Q
11 2CLR
10 2B
9 2A
(Top view)
Function Table
Inputs
Clear
A1
L
X
X
H
X
X
H
L
H
↓
↑
L
Notes: H; high level, L; low level, X; irrelevant
↑; transition from low to high level
↓; transition from high to low level
; one high-level pulse
; one low-level pulse
Block Diagram (1/2)
B2
X
X
L
↑
H
H
External parameter
Outputs
Q
Q
L
H
L
H
L
H
A
B
Clear
Cext Rext VCC
/Cext
QQ
QQ
Clear
Rev.2.00, Feb.18.2005, page 2 of 8
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