HD74LS78A 데이터 시트보기 (PDF) - Renesas Electronics

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HD74LS78A

Dual J-K Flip-Flops (with Preset, Common Clear, and Common Clock)

Renesas Electronics 

HD74LS78A

Testing Method

Test Circuit

1. ƒmax, tPLH, tPHL, (Clock→Q, Q)

VCC Output Q

Input 4.5V

P.G.

Zout=50Ω

PR

J

CK

K

CLR

Q

Output Q

Q

Load circuit 1

RL

CL

Same as Load Circuit 1.

Notes:

1. Test is put into the each flip-flop.

2. CL includes probe and jig capacitance.

3. All diodes are 1S2074(H).

2. tPHL, tPLH (Clear, Preset→ Q, Q)

Input

P.G.

Zout=50Ω

4.5V

Input

P.G.

Zout=50Ω

VCC Output Q

PR

J

Q

CK

K

CLR

Output Q

Q

Load circuit 1

RL

CL

Same as Load Circuit 1.

Notes:

1. Test is put into the each flip-flop.

2. CL includes probe and jig capacitance.

3. All diodes are 1S2074(H).

Rev.3.00, Jul.22.2005, page 4 of 6

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