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HD74HC4017 데이터 시트보기 (PDF) - Renesas Electronics

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HD74HC4017
Renesas
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HD74HC4017 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
HD74HC4017
Decade Counter / Divider
REJ03D0644-0200
(Previous ADE-205-530)
Rev.2.00
Mar 30, 2006
Description
The HD74HC4017 is a 5-stage divide-by-10 Johnson counter with ten decoded outputs and a carry-out bit. High-speed
operation and spike-free outputs are obtained by use of the Johnson decade counter configuration.
The ten decoded outputs are normally low and go high only at their respective decimal time periods. A high signal on
Reset R asynchronously clears the decade counter and sets the carry output and Y0 high. With CE low, the count is
advanced on a low-to-high transition at C input. Alternatively, if C is high, the count is advanced on a high-to-low
transition at CE. Each decoded output remains high for one full clock cycle. The carry output is high while Q0, Q1, Q2,
Q3 or Q4 is high, then is low while Q5, Q6, Q7, Q8 or Q9 is high.
Features
High Speed Operation
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HC4017P
DILP-16 pin
PRDP0016AE-B
P
(DP-16FV)
PRSP0016DH-B
HD74HC4017FPEL SOP-16 pin (JEITA)
(FP-16DAV)
FP
PRSP0016DG-A
HD74HC4017RPEL SOP-16 pin (JEDEC)
(FP-16DNV)
RP
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
Function Table
C
CE
L
X
X
H
X
X
L
X
X
H
Notes: 1. X: Don’t care
2. If n < 5 Carry = “H”, Otherwise = “L”
R
Decode Output = n
L
n
L
n
H
Q0
L
n+1
L
n
L
n
L
n+1
Rev.2.00 Mar 30, 2006 page 1 of 10

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