ML4621CQ 데이터 시트보기 (PDF) - Micro Linear Corporation

부품명

상세내역

일치하는 목록

ML4621CQ

Data Quantizer

Micro Linear Corporation 

ML4621

FUNCTIONAL DESCRIPTION

AMPLIFIER

The quantizer has a two stage limiting amplifier with an

input common mode range of (GND + 1.8V) to (VCC –

1.5V). Maximum sensitivity is achieved through the use

of a DC restoration feedback loop and AC coupling on

the input. The input DC bias voltage is set by an on-chip

network at about 1.9V when it is AC coupled. These

coupling capacitors, in conjunction with the input

impedance of the amplifier, establish a highpass filter

with a 3dB corner frequency, fL, at:

fL

=

2π

¥

1

8000

¥

C

(1)

Two capacitors of equal value are required since the

amplifier has a differential input. One of the coupling

capacitors can be tied to VCC as shown in Figure 1 if the

signal driving the input is single ended. The high corner

frequency can also be adjusted by attaching capacitors to

CF1 and CF2. The equation for adjusting this corner is:

fH

=

2π

¥

1

425 ¥

C

(2)

The offset voltage within the amplifier will be present at

the amplifier’s output even though the input is AC

coupled. This is represented by VOS in Figure 2. In order

to reduce this error a DC feedback loop is incorporated.

This negative feedback loop nulls the offset voltage,

forcing VOS to be zero. An external capacitor at VDC is

used to store the offset voltage. Although the value of

this capacitor is noncritical, the pole it creates can affect

the stability of the feedback loop. The value of this

capacitor should be at least 100 times smaller than the

input coupling capacitors to avoid stability problems

using the ML4621.

The output of the ML4621 amplifier is isolated from the

comparator and made available to the user. This allows

the user to add circuitry between the amplifier and the

comparator for wave shaping and other signal

conditioning.

COMPARATOR

Two types of comparators are employed in the output

section of these quantizers. The high speed ECL

comparator is used to provide the ECL level outputs, and

in turn drives the TTL comparator. The enable pin, CMP

ENABLE, is provided to control the ECL comparator.

When CMP ENABLE is low the comparators function

normally. When it is high it forces ECL+ high, ECL– low,

and TTL OUT high. The CMP ENABLE pin can be

controlled with TTL level signals when the quantizer is

powered by 5V and ground.

LINK MONITOR

This function is implemented by the minimum signal

discriminator and the threshold generator circuits. The

purpose of this function is to monitor the input signal and

provide a status signal indicating when the input falls

below a preset voltage level. This is done by peak

detecting the output of the amplifier section and

comparing this level with the voltage at VTHADJ.

470Ω

5V

4 3 2 1 28 27 26

0.1µF

0.5µF

18pF

5 VIN–

6 VIN+

7 NC

8 VDC

9 CF2

10 CF1

11 VOUT–

ML4621

NC 25

CPEAK 24

VREF 23

VTH ADJ 22

GND 21

TTL OUT 20

VCC TTL 19

18pF

0.001µF

12 13 14 15 16 17 18

5V

0.1µF

Figure 1. ML4621 Configured for 20MHz Bandwidth with TTL Output

6

Share Link: