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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

HCF4527B 데이터 시트보기 (PDF) - STMicroelectronics

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HCF4527B
STMICROELECTRONICS
STMicroelectronics STMICROELECTRONICS
HCF4527B Datasheet PDF : 12 Pages
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HCF4527B
Symbol
Parameter
VDD (V)
tR Inhibit Input Removal Time
5
10
15
tR Set Removal Time
5
10
15
tR Clear Removal Time
5
10
15
(*) Typical temperature coefficient for all VDD value is 0.3 %/°C.
Test Condition
Value (*)
Unit
Min. Typ. Max.
240 120
130 65
ns
110 55
150 75
80 40
ns
50 25
60 30
40 20
ns
30 15
APPLICATION NOTE :
For fractional multipliers with more than one digit,
HCF4527B may be cascaded in two different
modes: The ADD mode and the MULTIPLY mode
(see figure 1 and 2).
When two units are cascaded in ADD mode and
programmed to 9 and 4 respectively, the more
significant unit will have 9 output pulses for every
10 input pulses and the other will have 4 output
pulses for every 100 input pulses for a total of :
190 + 1040 = 19040
In the multiply mode, the fraction programmed into
the first rate multiplier is multiplied by the fraction
programmed into the second one :
If N1 = 9 and N2 =4
fOUT2 = 140fOUT1
fOUT1 = 190fCLOCK
fOUT2 = 140 x ( 190 fCLOCK ) = 13060 fCLOCK
Therefore 36 output pulses for every 100 clock
input pulses
Two HCF4527B Cascaded in the ADD mode with a Preset Number
8/12

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