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전자부품 반도체 검색엔진( 무료 PDF 다운로드 ) - 데이터시트뱅크

Z86E74 데이터 시트보기 (PDF) - Zilog

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Z86E74 Datasheet PDF : 19 Pages
First Prev 11 12 13 14 15 16 17 18 19
PRELIMINARY
AC CHARACTERISTICS (Z86L73/L74)
External I/O or Memory Read and Write Timing Table
No. Symbol
Parameter
VCC
Note [3]
1
TdA(AS)
Address Valid to
2.0V
/AS Rising Delay
3.9V
2
TdAS(A)
/AS Rising to Address
2.0V
Float Delay
3.9V
3
TdAS(DR)
/AS Rising to Read
2.0V
Data Required Valid
3.9V
4
TwAS
/AS Low Width
2.0V
3.9V
5
Td
Address Float to
2.0V
/DS Falling
3.9V
6
TwDSR
/DS (Read) Low Width
2.0V
3.9V
7
TwDSW
/DS (Write) Low Width
2.0V
3.9V
8
TdDSR(DR)
/DS Falling to Read
2.0V
Data Required Valid
3.9V
9
ThDR(DS)
Read Data to
2.0V
/DS Rising Hold Time
3.9V
10
TdDS(A)
/DS Rising to Address
2.0V
Active Delay
3.9V
11
TdDS(AS)
/DS Rising to /AS
2.0V
Falling Delay
3.9V
12
TdR/W(AS)
R//W Valid to /AS
2.0V
Rising Delay
3.9V
13
TdDS(R/W)
/DS Rising to
2.0V
R//W Not Valid
3.9V
14
TdDW(DSW)
Write Data Valid to /DS
2.0V
Falling (Write) Delay
3.9V
15
TdDS(DW)
/DS Rising to Write
2.0V
Data Not Valid Delay
3.9V
16
TdA(DR)
Address Valid to Read
2.0V
Data Required Valid
3.9V
17
TdAS(DS)
/AS Rising to
2.0V
/DS Falling Delay
3.9V
18
TdDM(AS)
/DM Valid to /AS
2.0V
Falling Delay
3.9V
19
TdDS(DM)
/DS Rise to
2.0V
/DM Valid Delay
3.9V
20
ThDS(A)
/DS Rise to Address
2.0V
Valid Hold Time
3.9V
Notes:
[1] When using extended memory timing add 2 TpC.
[2] Timing numbers given are for minimum TpC.
[3] 2.0V to 3.9V.
Standard Test Load.
All timing references use 0.9 VCC for a logic 1 and 0.1 VCC for a logic 0.
TA = 0°C to +70°C
8.0 MHz
Min
Max
55
55
70
70
400
400
80
80
0
0
300
300
165
165
260
260
0
0
85
95
60
70
70
70
70
70
80
80
70
80
475
475
100
100
55
55
70
70
70
70
Z86E73/E74/L73/L74
CP95LVO0801
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
[2]
[2]
[1, 2]
[2]
[1, 2]
[1, 2]
[1, 2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[1, 2]
[2]
[2]
13

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