MB40C568H 데이터 시트보기 (PDF) - Fujitsu
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MB40C568H Datasheet PDF : 12 Pages
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MB40C568H
s PIN ASSIGNMENT
AVDD
AVDD
AVSS
(LSB) D8
D7
D6
D5
D4
D3
D2
(MSB) D1
DVSS
(TOP VIEW)
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
AVSS
VRB
VREFB
VINA
VREFT
VRT
AVDD
AVSS
AVDD
AVSS
CLK
DVDD
(FPT-24P-M01)
(FPT-24P-M03)
s PIN DESCRIPTION
Pin No.
Pin name
Functions
1, 2, 16, 18
AVDD
Analog power supply pins (+5 V)
13
3, 15, 17, 24
DVDD
AVSS
Digital power supply pin (+3 or +5 V)
Analog power ground pins (0 V)
12
DVSS
Digital power ground pin (0 V)
4 to 11
14
D1 to D8
CLK
Digital output pins. D1: MSB, D8: LSB
Clock input pin
21
VINA
Analog input pin. Input range: VRB to VRT (2 Vp-p between 0.5 to 4 V)
19
VRT
Reference voltage input pin (3 V)
20
VREFT
Reference voltage output pin. When connected to VRT, the pin generates
0.6 × AVDD (3 V).
23
VRB
Reference voltage input pin (1 V)
22
VREFB
Reference voltage output pin. When connected to VRB, the pin generates
0.2 × AVDD (1 V).
Values within ( ) are typical values.
s NOTES ON USE
• Be sure to bypass the AVDD, DVDD, VRT and VRB pins to the ground using a high-frequency capacitor.
The high-frequency capacitor should be connected as near the pin as possible.
• Provide four clocks or more immediately after the power up to prevent current dissipation due to the
indeterminate internal logic.
2
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