IDT7024S15PFB 데이터 시트보기 (PDF) - Integrated Device Technology

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IDT7024S15PFB

HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM

Integrated Device Technology 

IDT7024S/L

HIGH-SPEED 4K x 16 DUAL-PORT STATIC RAM

MILITARY AND COMMERCIAL TEMPERATURE RANGES

WAVEFORM OF BUSY ARBITRATION CONTROLLED BY CE TIMING (M/S = VIH)(1)

ADDR"A"

and "B"

ADDRESSES MATCH

CE"A"

tAPS(2)

CE"B"

tBAC

BUSY"B"

tBDC

2740 drw 14

WAVEFORM OF BUSY ARBITRATION CYCLE CONTROLLED BY ADDRESS MATCH TIMING

S (M/ = VIH)(1)

ADDR"A"

ADDR"B"

BUSY"B"

tAPS (2)

ADDRESS "N"

MATCHING ADDRESS "N"

tBAA

tBDA

2740 drw 16

NOTES:

1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from “A”.

2. If tAPS is not satisfied, the busy signal will be asserted on one side or another but there is no guarantee on which side busy will be asserted.

AC ELECTRICAL CHARACTERISTICS OVER THE

OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(1)

Symbol

Parameter

IDT7024X15

Com'l. Only

Min. Max.

IDT7024X17

Com'l. Only

Min. Max.

INTERRUPT TIMING

tAS

Address Set-up Time

0

—

0

—

tWR

Write Recovery Time

0

—

0

—

tINS

Interrupt Set Time

—

15

—

15

tINR

Interrupt Reset Time

—

15

—

15

IDT7024X20

Min. Max.

0

—

0

—

—

20

—

20

IDT7024X25

Min. Max. Unit

0

— ns

0

— ns

—

20 ns

—

20 ns

Symbol

Parameter

INTERRUPT TIMING

tAS

Address Set-up Time

tWR

Write Recovery Time

tINS

Interrupt Set Time

tINR

Interrupt Reset Time

NOTE:

1. "X" in part numbers indicates power rating (S or L).

IDT7024X35

Min. Max.

IDT7024X55

Min. Max.

IDT7024X70

Mil. Only

Min. Max. Unit

0

—

0

—

0

— ns

0

—

0

—

0

— ns

—

25

—

40

—

50 ns

—

25

—

40

—

50 ns

2740 tbl 16

6.15

14

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