EP7312-IV-90 데이터 시트보기 (PDF) - Cirrus Logic

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EP7312-IV-90

High-Performance, Low-Power System on Chip with SDRAM and Enhanced Digital Audio Interface

Cirrus Logic 

EP7312

High-Performance, Low-Power System on Chip

JTAG Interface .................................................................................................................................................... 29

Packages ............................................................................................................................................ 30

208-Pin LQFP Package Characteristics ............................................................................................................. 30

EP7312

208-Pin LQFP ............................................................................................................................ 30

208-Pin LQFP Pin Diagram ................................................................................................................................ 31

EP7312 ............................................................................................................................................... 31

208-Pin LQFP Numeric Pin Listing ..................................................................................................................... 32

204-Ball TFBGA Package Characteristics .......................................................................................................... 38

204-Ball TFBGA Pinout (Top View) ..................................................................................................................... 39

204-Ball TFBGA Ball Listing ............................................................................................................................... 40

256-Ball PBGA Package Characteristics ............................................................................................................ 46

256-Ball PBGA Pinout (Top View) ....................................................................................................................... 48

256-Ball PBGA Ball Listing ................................................................................................................................. 49

JTAG Boundary Scan Signal Ordering ............................................................................................................... 54

CONVENTIONS ................................................................................................................................. 60

Acronyms and Abbreviations .............................................................................................................................. 60

Units of Measurement ......................................................................................................................................... 60

General Conventions .......................................................................................................................................... 61

Pin Description Conventions ............................................................................................................................... 61

Ordering Information ........................................................................................................................ 62

Ordering Information Legend .............................................................................................................................. 62

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©Copyright Cirrus Logic, Inc. 2003

(All Rights Reserved)

DS508PP5

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