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BT8110

High-Capacity ADPCM Processor

Conexant Systems 

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1.0 Product Description

The Adaptive Differential Pulse Code Modulation (ADPCM) algorithm is a

transcoding operation which consists of encoding 64 kbit/s Pulse Code

Modulation (PCM) to 16, 24, 32, or 40 kbit/s ADPCM and decoding from

ADPCM to 64 kbit/s PCM. The multichannel processor provides transcoding for

both A-law and µ-law PCM codes. The PCM coding rate is selectable on a

channel-by-channel basis.

The Bt8110/8110B has a maximum capacity of 64 channels of ADPCM

operations. It can be configured to provide 24 or 32 full-duplex channels

providing both encoding and decoding. It can also be configured to provide 48 or

64 half-duplex channels providing either encoding or decoding. The

Bt8110/8110B consists of a VLSI CMOS integrated circuit and a ROM.

NOTE: In the Bt8110, the ROM is external. Additionally, for the Bt8110, a 64 K

ROM will provide six different ADPCM codes, while a 128 K ROM will

provide 14 different ADPCM codes. (See Table 3-1.). The Bt8110B has an

internal ROM or can be used with the external ROM. The Bt8110B’s

internal ROM contains 14 different ADPCM codes (see Table 3-2),

Two Bt8110/8110Bs and a single ROM can be configured to provide 48 or 64

full-duplex channels for operation in transcoding applications. There are two

control modes for the Bt8110/8110B: Hardware and Microprocessor. The

hardware mode provides for input of code selection, transparency selection,

algorithm reset, and PCM coding law on a per-channel basis. The microprocessor

mode is provided via an integral interface to a microprocessor consisting of a

microprocessor, program and data memory, and desired status indicators.

100060C

Conexant

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