HD74CDCV857A 데이터 시트보기 (PDF) - Renesas Electronics

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HD74CDCV857A

2.5-V Phase-lock Loop Clock Driver

Renesas Electronics 

HD74CDCV857A

Logic Diagram

PWRDWN 37

AVCC 16

Power down

and Test

Logic

CLK 13

CLK 14

PLL

FBIN 36

FBIN 35

3 Y0

2

Y0

5 Y1

6

Y1

10 Y2

9

Y2

20 Y3

19

Y3

22 Y4

23

Y4

46 Y5

47

Y5

44 Y6

43

Y6

39 Y7

40

Y7

29 Y8

30

Y8

27 Y9

26

Y9

32 FBOUT

33

FBOUT

Note: All inputs and outputs are associated with VDDQ = 2.5 V.

Rev.3.00, Oct.09.2003, page 4 of 12

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