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SL74HC367

Hex 3-State Noninverting Buffer with Separate 2-Bit and 4-Bit Sections

System Logic Semiconductor 

SL74HC367

AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns)

Symbol

Parameter

TPLH, tPHL Maximum Propagation Delay, Input A to

Output Y (Figures 1 and 3)

TPLZ, tPHZ Maximum Propagation Delay ,Output Enable to

Output Y (Figures 2 and 4)

TPZL, tPZH Maximum Propagation Delay ,Output Enable to

Output Y (Figures 2 and 4)

TTLH, tTHL Maximum Output Transition Time, Any Output

(Figures 1 and 3)

CIN

Maximum Input Capacitance

COUT Maximum Three-State Output Capacitance

(Output in High-Impedance State)

VCC

Guaranteed Limit

V 25 °C to ≤85°C ≤125°C Unit

-55°C

2.0 120

150

180

ns

4.5 24

30

36

6.0 20

26

31

2.0 175

220

265

ns

4.5 35

44

53

6.0 30

37

46

2.0 190

240

285

ns

4.5 38

48

57

6.0 32

41

48

2.0 60

75

90

ns

4.5 12

15

18

6.0 10

13

15

-

10

10

10

pF

-

15

15

15

pF

Power Dissipation Capacitance (Per Buffer)

CPD Used to determine the no-load dynamic power

consumption:

PD=CPDVCC2f+ICCVCC

Typical @25°C,VCC=5.0 V

40

pF

Figure 1. Switching Waveforms

Figure 2. Switching Waveforms

SLS

System Logic

Semiconductor

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