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M74HC193

SYNCHRONOUS UP/DOWN BINARY COUNTER

STMicroelectronics 

M74HC193

SYNCHRONOUS UP/DOWN BINARY COUNTER

s HIGH SPEED :

fMAX = 55 MHz (TYP.) at VCC = 6V

s LOW POWER DISSIPATION:

ICC =4µA(MAX.) at TA=25°C

s HIGH NOISE IMMUNITY:

VNIH = VNIL = 28 % VCC (MIN.)

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 4mA (MIN)

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s WIDE OPERATING VOLTAGE RANGE:

VCC (OPR) = 2V to 6V

s PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 193

DESCRIPTION

The M74HC193 is an high speed CMOS

SYNCRONOUS

UP/DOWN

BINARY

COUNTERS fabricated with silicon gate C2MOS

technology.

The counter has two separate clock inputs, an UP

COUNT input and a DOWN COUNT input. All

outputs of the flip-flop are simultaneously

triggered on the low to high transition of either

clock while the other input is held high. The

direction of counting is determined by which input

is clocked. This counter may be preset by entering

the desired data on the DATA A, DATA B, DATA

C, and DATA D input. When the LOAD input is

taken low the data is loaded independently of

either clock input. This feature allows the counters

to be used as divide-by-n counters by modifying

the count length with the preset inputs. In addition

PIN CONNECTION AND IEC LOGIC SYMBOLS

DIP

SOP

TSSOP

ORDER CODES

PACKAGE

TUBE

DIP

SOP

TSSO P

M74HC193B1R

M74HC193M1R

T&R

M74HC193RM13TR

M74HC193TTR

the counter can also be cleared. This is

accomplished by inputting a high on the clear

input. All 4 internal stages are set to low

independently of either COUNT input. Both a

BORROW and CARRY output are provided to

enable cascading of both up and down counting

functions. The BORROW output produces a

negative going pulse when the counter underflows

and the CARRY outputs a pulse when the

counters overflows. The counter can be cascaded

by connection the CARRY and BORROW outputs

of one device to the COUNT UP and COUNT

DOWN inputs, respectively, of the next device.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

July 2001

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